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comparison src/share/vm/opto/compile.cpp @ 6179:8c92982cbbc4

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7119644: Increase superword's vector size up to 256 bits Summary: Increase vector size up to 256-bits for YMM AVX registers on x86. Reviewed-by: never, twisti, roland
author kvn
date Fri, 15 Jun 2012 01:25:19 -0700
parents 8b0a4867acf0
children 6c5b7a6becc8
comparison
equal deleted inserted replaced
6146:eba1d5bce9e8 6179:8c92982cbbc4
2589 } 2589 }
2590 } 2590 }
2591 } 2591 }
2592 break; 2592 break;
2593 2593
2594 case Op_Load16B: 2594 case Op_LoadVector:
2595 case Op_Load8B: 2595 case Op_StoreVector:
2596 case Op_Load4B:
2597 case Op_Load8S:
2598 case Op_Load4S:
2599 case Op_Load2S:
2600 case Op_Load8C:
2601 case Op_Load4C:
2602 case Op_Load2C:
2603 case Op_Load4I:
2604 case Op_Load2I:
2605 case Op_Load2L:
2606 case Op_Load4F:
2607 case Op_Load2F:
2608 case Op_Load2D:
2609 case Op_Store16B:
2610 case Op_Store8B:
2611 case Op_Store4B:
2612 case Op_Store8C:
2613 case Op_Store4C:
2614 case Op_Store2C:
2615 case Op_Store4I:
2616 case Op_Store2I:
2617 case Op_Store2L:
2618 case Op_Store4F:
2619 case Op_Store2F:
2620 case Op_Store2D:
2621 break; 2596 break;
2622 2597
2623 case Op_PackB: 2598 case Op_PackB:
2624 case Op_PackS: 2599 case Op_PackS:
2625 case Op_PackC:
2626 case Op_PackI: 2600 case Op_PackI:
2627 case Op_PackF: 2601 case Op_PackF:
2628 case Op_PackL: 2602 case Op_PackL:
2629 case Op_PackD: 2603 case Op_PackD:
2630 if (n->req()-1 > 2) { 2604 if (n->req()-1 > 2) {