Mercurial > hg > truffle
comparison src/cpu/x86/vm/x86_64.ad @ 6848:8e47bac5643a
7054512: Compress class pointers after perm gen removal
Summary: support of compress class pointers in the compilers.
Reviewed-by: kvn, twisti
author | roland |
---|---|
date | Tue, 09 Oct 2012 10:11:38 +0200 |
parents | 7eca5de9e0b6 |
children | f6badecb7ea7 |
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6847:65d07d9ee446 | 6848:8e47bac5643a |
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1407 | 1407 |
1408 //============================================================================= | 1408 //============================================================================= |
1409 #ifndef PRODUCT | 1409 #ifndef PRODUCT |
1410 void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const | 1410 void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const |
1411 { | 1411 { |
1412 if (UseCompressedOops) { | 1412 if (UseCompressedKlassPointers) { |
1413 st->print_cr("movl rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass"); | 1413 st->print_cr("movl rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass"); |
1414 if (Universe::narrow_oop_shift() != 0) { | 1414 if (Universe::narrow_klass_shift() != 0) { |
1415 st->print_cr("\tdecode_heap_oop_not_null rscratch1, rscratch1"); | 1415 st->print_cr("\tdecode_klass_not_null rscratch1, rscratch1"); |
1416 } | 1416 } |
1417 st->print_cr("\tcmpq rax, rscratch1\t # Inline cache check"); | 1417 st->print_cr("\tcmpq rax, rscratch1\t # Inline cache check"); |
1418 } else { | 1418 } else { |
1419 st->print_cr("\tcmpq rax, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t" | 1419 st->print_cr("\tcmpq rax, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t" |
1420 "# Inline cache check"); | 1420 "# Inline cache check"); |
1426 | 1426 |
1427 void MachUEPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const | 1427 void MachUEPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const |
1428 { | 1428 { |
1429 MacroAssembler masm(&cbuf); | 1429 MacroAssembler masm(&cbuf); |
1430 uint insts_size = cbuf.insts_size(); | 1430 uint insts_size = cbuf.insts_size(); |
1431 if (UseCompressedOops) { | 1431 if (UseCompressedKlassPointers) { |
1432 masm.load_klass(rscratch1, j_rarg0); | 1432 masm.load_klass(rscratch1, j_rarg0); |
1433 masm.cmpptr(rax, rscratch1); | 1433 masm.cmpptr(rax, rscratch1); |
1434 } else { | 1434 } else { |
1435 masm.cmpptr(rax, Address(j_rarg0, oopDesc::klass_offset_in_bytes())); | 1435 masm.cmpptr(rax, Address(j_rarg0, oopDesc::klass_offset_in_bytes())); |
1436 } | 1436 } |
1572 const bool Matcher::need_masked_shift_count = false; | 1572 const bool Matcher::need_masked_shift_count = false; |
1573 | 1573 |
1574 bool Matcher::narrow_oop_use_complex_address() { | 1574 bool Matcher::narrow_oop_use_complex_address() { |
1575 assert(UseCompressedOops, "only for compressed oops code"); | 1575 assert(UseCompressedOops, "only for compressed oops code"); |
1576 return (LogMinObjAlignmentInBytes <= 3); | 1576 return (LogMinObjAlignmentInBytes <= 3); |
1577 } | |
1578 | |
1579 bool Matcher::narrow_klass_use_complex_address() { | |
1580 assert(UseCompressedKlassPointers, "only for compressed klass code"); | |
1581 return (LogKlassAlignmentInBytes <= 3); | |
1577 } | 1582 } |
1578 | 1583 |
1579 // Is it better to copy float constants, or load them directly from | 1584 // Is it better to copy float constants, or load them directly from |
1580 // memory? Intel can load a float constant from a direct address, | 1585 // memory? Intel can load a float constant from a direct address, |
1581 // requiring no extra registers. Most RISCs will have to materialize | 1586 // requiring no extra registers. Most RISCs will have to materialize |
3137 op_cost(10); | 3142 op_cost(10); |
3138 format %{ %} | 3143 format %{ %} |
3139 interface(CONST_INTER); | 3144 interface(CONST_INTER); |
3140 %} | 3145 %} |
3141 | 3146 |
3147 operand immNKlass() %{ | |
3148 match(ConNKlass); | |
3149 | |
3150 op_cost(10); | |
3151 format %{ %} | |
3152 interface(CONST_INTER); | |
3153 %} | |
3154 | |
3142 // NULL Pointer Immediate | 3155 // NULL Pointer Immediate |
3143 operand immN0() %{ | 3156 operand immN0() %{ |
3144 predicate(n->get_narrowcon() == 0); | 3157 predicate(n->get_narrowcon() == 0); |
3145 match(ConN); | 3158 match(ConN); |
3146 | 3159 |
4036 scale($scale); | 4049 scale($scale); |
4037 disp($off); | 4050 disp($off); |
4038 %} | 4051 %} |
4039 %} | 4052 %} |
4040 | 4053 |
4054 operand indirectNarrowKlass(rRegN reg) | |
4055 %{ | |
4056 predicate(Universe::narrow_klass_shift() == 0); | |
4057 constraint(ALLOC_IN_RC(ptr_reg)); | |
4058 match(DecodeNKlass reg); | |
4059 | |
4060 format %{ "[$reg]" %} | |
4061 interface(MEMORY_INTER) %{ | |
4062 base($reg); | |
4063 index(0x4); | |
4064 scale(0x0); | |
4065 disp(0x0); | |
4066 %} | |
4067 %} | |
4068 | |
4069 operand indOffset8NarrowKlass(rRegN reg, immL8 off) | |
4070 %{ | |
4071 predicate(Universe::narrow_klass_shift() == 0); | |
4072 constraint(ALLOC_IN_RC(ptr_reg)); | |
4073 match(AddP (DecodeNKlass reg) off); | |
4074 | |
4075 format %{ "[$reg + $off (8-bit)]" %} | |
4076 interface(MEMORY_INTER) %{ | |
4077 base($reg); | |
4078 index(0x4); | |
4079 scale(0x0); | |
4080 disp($off); | |
4081 %} | |
4082 %} | |
4083 | |
4084 operand indOffset32NarrowKlass(rRegN reg, immL32 off) | |
4085 %{ | |
4086 predicate(Universe::narrow_klass_shift() == 0); | |
4087 constraint(ALLOC_IN_RC(ptr_reg)); | |
4088 match(AddP (DecodeNKlass reg) off); | |
4089 | |
4090 format %{ "[$reg + $off (32-bit)]" %} | |
4091 interface(MEMORY_INTER) %{ | |
4092 base($reg); | |
4093 index(0x4); | |
4094 scale(0x0); | |
4095 disp($off); | |
4096 %} | |
4097 %} | |
4098 | |
4099 operand indIndexOffsetNarrowKlass(rRegN reg, rRegL lreg, immL32 off) | |
4100 %{ | |
4101 predicate(Universe::narrow_klass_shift() == 0); | |
4102 constraint(ALLOC_IN_RC(ptr_reg)); | |
4103 match(AddP (AddP (DecodeNKlass reg) lreg) off); | |
4104 | |
4105 op_cost(10); | |
4106 format %{"[$reg + $off + $lreg]" %} | |
4107 interface(MEMORY_INTER) %{ | |
4108 base($reg); | |
4109 index($lreg); | |
4110 scale(0x0); | |
4111 disp($off); | |
4112 %} | |
4113 %} | |
4114 | |
4115 operand indIndexNarrowKlass(rRegN reg, rRegL lreg) | |
4116 %{ | |
4117 predicate(Universe::narrow_klass_shift() == 0); | |
4118 constraint(ALLOC_IN_RC(ptr_reg)); | |
4119 match(AddP (DecodeNKlass reg) lreg); | |
4120 | |
4121 op_cost(10); | |
4122 format %{"[$reg + $lreg]" %} | |
4123 interface(MEMORY_INTER) %{ | |
4124 base($reg); | |
4125 index($lreg); | |
4126 scale(0x0); | |
4127 disp(0x0); | |
4128 %} | |
4129 %} | |
4130 | |
4131 operand indIndexScaleNarrowKlass(rRegN reg, rRegL lreg, immI2 scale) | |
4132 %{ | |
4133 predicate(Universe::narrow_klass_shift() == 0); | |
4134 constraint(ALLOC_IN_RC(ptr_reg)); | |
4135 match(AddP (DecodeNKlass reg) (LShiftL lreg scale)); | |
4136 | |
4137 op_cost(10); | |
4138 format %{"[$reg + $lreg << $scale]" %} | |
4139 interface(MEMORY_INTER) %{ | |
4140 base($reg); | |
4141 index($lreg); | |
4142 scale($scale); | |
4143 disp(0x0); | |
4144 %} | |
4145 %} | |
4146 | |
4147 operand indIndexScaleOffsetNarrowKlass(rRegN reg, immL32 off, rRegL lreg, immI2 scale) | |
4148 %{ | |
4149 predicate(Universe::narrow_klass_shift() == 0); | |
4150 constraint(ALLOC_IN_RC(ptr_reg)); | |
4151 match(AddP (AddP (DecodeNKlass reg) (LShiftL lreg scale)) off); | |
4152 | |
4153 op_cost(10); | |
4154 format %{"[$reg + $off + $lreg << $scale]" %} | |
4155 interface(MEMORY_INTER) %{ | |
4156 base($reg); | |
4157 index($lreg); | |
4158 scale($scale); | |
4159 disp($off); | |
4160 %} | |
4161 %} | |
4162 | |
4163 operand indCompressedKlassOffset(rRegN reg, immL32 off) %{ | |
4164 predicate(UseCompressedKlassPointers && (Universe::narrow_klass_shift() == Address::times_8)); | |
4165 constraint(ALLOC_IN_RC(ptr_reg)); | |
4166 match(AddP (DecodeNKlass reg) off); | |
4167 | |
4168 op_cost(10); | |
4169 format %{"[R12 + $reg << 3 + $off] (compressed klass addressing)" %} | |
4170 interface(MEMORY_INTER) %{ | |
4171 base(0xc); // R12 | |
4172 index($reg); | |
4173 scale(0x3); | |
4174 disp($off); | |
4175 %} | |
4176 %} | |
4177 | |
4178 operand indPosIndexScaleOffsetNarrowKlass(rRegN reg, immL32 off, rRegI idx, immI2 scale) | |
4179 %{ | |
4180 constraint(ALLOC_IN_RC(ptr_reg)); | |
4181 predicate(Universe::narrow_klass_shift() == 0 && n->in(2)->in(3)->in(1)->as_Type()->type()->is_long()->_lo >= 0); | |
4182 match(AddP (AddP (DecodeNKlass reg) (LShiftL (ConvI2L idx) scale)) off); | |
4183 | |
4184 op_cost(10); | |
4185 format %{"[$reg + $off + $idx << $scale]" %} | |
4186 interface(MEMORY_INTER) %{ | |
4187 base($reg); | |
4188 index($idx); | |
4189 scale($scale); | |
4190 disp($off); | |
4191 %} | |
4192 %} | |
4041 | 4193 |
4042 //----------Special Memory Operands-------------------------------------------- | 4194 //----------Special Memory Operands-------------------------------------------- |
4043 // Stack Slot Operand - This operand is used for loading and storing temporary | 4195 // Stack Slot Operand - This operand is used for loading and storing temporary |
4044 // values on the stack where a match requires a value to | 4196 // values on the stack where a match requires a value to |
4045 // flow through memory. | 4197 // flow through memory. |
4207 opclass memory(indirect, indOffset8, indOffset32, indIndexOffset, indIndex, | 4359 opclass memory(indirect, indOffset8, indOffset32, indIndexOffset, indIndex, |
4208 indIndexScale, indIndexScaleOffset, indPosIndexScaleOffset, | 4360 indIndexScale, indIndexScaleOffset, indPosIndexScaleOffset, |
4209 indCompressedOopOffset, | 4361 indCompressedOopOffset, |
4210 indirectNarrow, indOffset8Narrow, indOffset32Narrow, | 4362 indirectNarrow, indOffset8Narrow, indOffset32Narrow, |
4211 indIndexOffsetNarrow, indIndexNarrow, indIndexScaleNarrow, | 4363 indIndexOffsetNarrow, indIndexNarrow, indIndexScaleNarrow, |
4212 indIndexScaleOffsetNarrow, indPosIndexScaleOffsetNarrow); | 4364 indIndexScaleOffsetNarrow, indPosIndexScaleOffsetNarrow, |
4365 indCompressedKlassOffset, | |
4366 indirectNarrowKlass, indOffset8NarrowKlass, indOffset32NarrowKlass, | |
4367 indIndexOffsetNarrowKlass, indIndexNarrowKlass, indIndexScaleNarrowKlass, | |
4368 indIndexScaleOffsetNarrowKlass, indPosIndexScaleOffsetNarrowKlass); | |
4213 | 4369 |
4214 //----------PIPELINE----------------------------------------------------------- | 4370 //----------PIPELINE----------------------------------------------------------- |
4215 // Rules which define the behavior of the target architectures pipeline. | 4371 // Rules which define the behavior of the target architectures pipeline. |
4216 pipeline %{ | 4372 pipeline %{ |
4217 | 4373 |
5467 } | 5623 } |
5468 %} | 5624 %} |
5469 ins_pipe(ialu_reg_fat); // XXX | 5625 ins_pipe(ialu_reg_fat); // XXX |
5470 %} | 5626 %} |
5471 | 5627 |
5628 instruct loadConNKlass(rRegN dst, immNKlass src) %{ | |
5629 match(Set dst src); | |
5630 | |
5631 ins_cost(125); | |
5632 format %{ "movl $dst, $src\t# compressed klass ptr" %} | |
5633 ins_encode %{ | |
5634 address con = (address)$src$$constant; | |
5635 if (con == NULL) { | |
5636 ShouldNotReachHere(); | |
5637 } else { | |
5638 __ set_narrow_klass($dst$$Register, (Klass*)$src$$constant); | |
5639 } | |
5640 %} | |
5641 ins_pipe(ialu_reg_fat); // XXX | |
5642 %} | |
5643 | |
5472 instruct loadConF0(regF dst, immF0 src) | 5644 instruct loadConF0(regF dst, immF0 src) |
5473 %{ | 5645 %{ |
5474 match(Set dst src); | 5646 match(Set dst src); |
5475 ins_cost(100); | 5647 ins_cost(100); |
5476 | 5648 |
5736 ins_pipe(ialu_mem_reg); | 5908 ins_pipe(ialu_mem_reg); |
5737 %} | 5909 %} |
5738 | 5910 |
5739 instruct storeImmP0(memory mem, immP0 zero) | 5911 instruct storeImmP0(memory mem, immP0 zero) |
5740 %{ | 5912 %{ |
5741 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL)); | 5913 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL) && (Universe::narrow_klass_base() == NULL)); |
5742 match(Set mem (StoreP mem zero)); | 5914 match(Set mem (StoreP mem zero)); |
5743 | 5915 |
5744 ins_cost(125); // XXX | 5916 ins_cost(125); // XXX |
5745 format %{ "movq $mem, R12\t# ptr (R12_heapbase==0)" %} | 5917 format %{ "movq $mem, R12\t# ptr (R12_heapbase==0)" %} |
5746 ins_encode %{ | 5918 ins_encode %{ |
5772 __ movl($mem$$Address, $src$$Register); | 5944 __ movl($mem$$Address, $src$$Register); |
5773 %} | 5945 %} |
5774 ins_pipe(ialu_mem_reg); | 5946 ins_pipe(ialu_mem_reg); |
5775 %} | 5947 %} |
5776 | 5948 |
5949 instruct storeNKlass(memory mem, rRegN src) | |
5950 %{ | |
5951 match(Set mem (StoreNKlass mem src)); | |
5952 | |
5953 ins_cost(125); // XXX | |
5954 format %{ "movl $mem, $src\t# compressed klass ptr" %} | |
5955 ins_encode %{ | |
5956 __ movl($mem$$Address, $src$$Register); | |
5957 %} | |
5958 ins_pipe(ialu_mem_reg); | |
5959 %} | |
5960 | |
5777 instruct storeImmN0(memory mem, immN0 zero) | 5961 instruct storeImmN0(memory mem, immN0 zero) |
5778 %{ | 5962 %{ |
5779 predicate(Universe::narrow_oop_base() == NULL); | 5963 predicate(Universe::narrow_oop_base() == NULL && Universe::narrow_klass_base() == NULL); |
5780 match(Set mem (StoreN mem zero)); | 5964 match(Set mem (StoreN mem zero)); |
5781 | 5965 |
5782 ins_cost(125); // XXX | 5966 ins_cost(125); // XXX |
5783 format %{ "movl $mem, R12\t# compressed ptr (R12_heapbase==0)" %} | 5967 format %{ "movl $mem, R12\t# compressed ptr (R12_heapbase==0)" %} |
5784 ins_encode %{ | 5968 ins_encode %{ |
5802 } | 5986 } |
5803 %} | 5987 %} |
5804 ins_pipe(ialu_mem_imm); | 5988 ins_pipe(ialu_mem_imm); |
5805 %} | 5989 %} |
5806 | 5990 |
5991 instruct storeImmNKlass(memory mem, immNKlass src) | |
5992 %{ | |
5993 match(Set mem (StoreNKlass mem src)); | |
5994 | |
5995 ins_cost(150); // XXX | |
5996 format %{ "movl $mem, $src\t# compressed klass ptr" %} | |
5997 ins_encode %{ | |
5998 __ set_narrow_klass($mem$$Address, (Klass*)$src$$constant); | |
5999 %} | |
6000 ins_pipe(ialu_mem_imm); | |
6001 %} | |
6002 | |
5807 // Store Integer Immediate | 6003 // Store Integer Immediate |
5808 instruct storeImmI0(memory mem, immI0 zero) | 6004 instruct storeImmI0(memory mem, immI0 zero) |
5809 %{ | 6005 %{ |
5810 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL)); | 6006 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL) && (Universe::narrow_klass_base() == NULL)); |
5811 match(Set mem (StoreI mem zero)); | 6007 match(Set mem (StoreI mem zero)); |
5812 | 6008 |
5813 ins_cost(125); // XXX | 6009 ins_cost(125); // XXX |
5814 format %{ "movl $mem, R12\t# int (R12_heapbase==0)" %} | 6010 format %{ "movl $mem, R12\t# int (R12_heapbase==0)" %} |
5815 ins_encode %{ | 6011 ins_encode %{ |
5830 %} | 6026 %} |
5831 | 6027 |
5832 // Store Long Immediate | 6028 // Store Long Immediate |
5833 instruct storeImmL0(memory mem, immL0 zero) | 6029 instruct storeImmL0(memory mem, immL0 zero) |
5834 %{ | 6030 %{ |
5835 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL)); | 6031 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL) && (Universe::narrow_klass_base() == NULL)); |
5836 match(Set mem (StoreL mem zero)); | 6032 match(Set mem (StoreL mem zero)); |
5837 | 6033 |
5838 ins_cost(125); // XXX | 6034 ins_cost(125); // XXX |
5839 format %{ "movq $mem, R12\t# long (R12_heapbase==0)" %} | 6035 format %{ "movq $mem, R12\t# long (R12_heapbase==0)" %} |
5840 ins_encode %{ | 6036 ins_encode %{ |
5855 %} | 6051 %} |
5856 | 6052 |
5857 // Store Short/Char Immediate | 6053 // Store Short/Char Immediate |
5858 instruct storeImmC0(memory mem, immI0 zero) | 6054 instruct storeImmC0(memory mem, immI0 zero) |
5859 %{ | 6055 %{ |
5860 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL)); | 6056 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL) && (Universe::narrow_klass_base() == NULL)); |
5861 match(Set mem (StoreC mem zero)); | 6057 match(Set mem (StoreC mem zero)); |
5862 | 6058 |
5863 ins_cost(125); // XXX | 6059 ins_cost(125); // XXX |
5864 format %{ "movw $mem, R12\t# short/char (R12_heapbase==0)" %} | 6060 format %{ "movw $mem, R12\t# short/char (R12_heapbase==0)" %} |
5865 ins_encode %{ | 6061 ins_encode %{ |
5881 %} | 6077 %} |
5882 | 6078 |
5883 // Store Byte Immediate | 6079 // Store Byte Immediate |
5884 instruct storeImmB0(memory mem, immI0 zero) | 6080 instruct storeImmB0(memory mem, immI0 zero) |
5885 %{ | 6081 %{ |
5886 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL)); | 6082 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL) && (Universe::narrow_klass_base() == NULL)); |
5887 match(Set mem (StoreB mem zero)); | 6083 match(Set mem (StoreB mem zero)); |
5888 | 6084 |
5889 ins_cost(125); // XXX | 6085 ins_cost(125); // XXX |
5890 format %{ "movb $mem, R12\t# short/char (R12_heapbase==0)" %} | 6086 format %{ "movb $mem, R12\t# short/char (R12_heapbase==0)" %} |
5891 ins_encode %{ | 6087 ins_encode %{ |
5906 %} | 6102 %} |
5907 | 6103 |
5908 // Store CMS card-mark Immediate | 6104 // Store CMS card-mark Immediate |
5909 instruct storeImmCM0_reg(memory mem, immI0 zero) | 6105 instruct storeImmCM0_reg(memory mem, immI0 zero) |
5910 %{ | 6106 %{ |
5911 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL)); | 6107 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL) && (Universe::narrow_klass_base() == NULL)); |
5912 match(Set mem (StoreCM mem zero)); | 6108 match(Set mem (StoreCM mem zero)); |
5913 | 6109 |
5914 ins_cost(125); // XXX | 6110 ins_cost(125); // XXX |
5915 format %{ "movb $mem, R12\t# CMS card-mark byte 0 (R12_heapbase==0)" %} | 6111 format %{ "movb $mem, R12\t# CMS card-mark byte 0 (R12_heapbase==0)" %} |
5916 ins_encode %{ | 6112 ins_encode %{ |
5944 %} | 6140 %} |
5945 | 6141 |
5946 // Store immediate Float value (it is faster than store from XMM register) | 6142 // Store immediate Float value (it is faster than store from XMM register) |
5947 instruct storeF0(memory mem, immF0 zero) | 6143 instruct storeF0(memory mem, immF0 zero) |
5948 %{ | 6144 %{ |
5949 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL)); | 6145 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL) && (Universe::narrow_klass_base() == NULL)); |
5950 match(Set mem (StoreF mem zero)); | 6146 match(Set mem (StoreF mem zero)); |
5951 | 6147 |
5952 ins_cost(25); // XXX | 6148 ins_cost(25); // XXX |
5953 format %{ "movl $mem, R12\t# float 0. (R12_heapbase==0)" %} | 6149 format %{ "movl $mem, R12\t# float 0. (R12_heapbase==0)" %} |
5954 ins_encode %{ | 6150 ins_encode %{ |
5994 ins_pipe(ialu_mem_imm); | 6190 ins_pipe(ialu_mem_imm); |
5995 %} | 6191 %} |
5996 | 6192 |
5997 instruct storeD0(memory mem, immD0 zero) | 6193 instruct storeD0(memory mem, immD0 zero) |
5998 %{ | 6194 %{ |
5999 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL)); | 6195 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL) && (Universe::narrow_klass_base() == NULL)); |
6000 match(Set mem (StoreD mem zero)); | 6196 match(Set mem (StoreD mem zero)); |
6001 | 6197 |
6002 ins_cost(25); // XXX | 6198 ins_cost(25); // XXX |
6003 format %{ "movq $mem, R12\t# double 0. (R12_heapbase==0)" %} | 6199 format %{ "movq $mem, R12\t# double 0. (R12_heapbase==0)" %} |
6004 ins_encode %{ | 6200 ins_encode %{ |
6475 Register d = $dst$$Register; | 6671 Register d = $dst$$Register; |
6476 if (s != d) { | 6672 if (s != d) { |
6477 __ decode_heap_oop_not_null(d, s); | 6673 __ decode_heap_oop_not_null(d, s); |
6478 } else { | 6674 } else { |
6479 __ decode_heap_oop_not_null(d); | 6675 __ decode_heap_oop_not_null(d); |
6676 } | |
6677 %} | |
6678 ins_pipe(ialu_reg_long); | |
6679 %} | |
6680 | |
6681 instruct encodeKlass_not_null(rRegN dst, rRegP src, rFlagsReg cr) %{ | |
6682 match(Set dst (EncodePKlass src)); | |
6683 effect(KILL cr); | |
6684 format %{ "encode_heap_oop_not_null $dst,$src" %} | |
6685 ins_encode %{ | |
6686 __ encode_klass_not_null($dst$$Register, $src$$Register); | |
6687 %} | |
6688 ins_pipe(ialu_reg_long); | |
6689 %} | |
6690 | |
6691 instruct decodeKlass_not_null(rRegP dst, rRegN src, rFlagsReg cr) %{ | |
6692 match(Set dst (DecodeNKlass src)); | |
6693 effect(KILL cr); | |
6694 format %{ "decode_heap_oop_not_null $dst,$src" %} | |
6695 ins_encode %{ | |
6696 Register s = $src$$Register; | |
6697 Register d = $dst$$Register; | |
6698 if (s != d) { | |
6699 __ decode_klass_not_null(d, s); | |
6700 } else { | |
6701 __ decode_klass_not_null(d); | |
6480 } | 6702 } |
6481 %} | 6703 %} |
6482 ins_pipe(ialu_reg_long); | 6704 ins_pipe(ialu_reg_long); |
6483 %} | 6705 %} |
6484 | 6706 |
10450 ins_pipe(ialu_cr_reg_imm); | 10672 ins_pipe(ialu_cr_reg_imm); |
10451 %} | 10673 %} |
10452 | 10674 |
10453 instruct testP_mem_reg0(rFlagsReg cr, memory mem, immP0 zero) | 10675 instruct testP_mem_reg0(rFlagsReg cr, memory mem, immP0 zero) |
10454 %{ | 10676 %{ |
10455 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL)); | 10677 predicate(UseCompressedOops && (Universe::narrow_oop_base() == NULL) && (Universe::narrow_klass_base() == NULL)); |
10456 match(Set cr (CmpP (LoadP mem) zero)); | 10678 match(Set cr (CmpP (LoadP mem) zero)); |
10457 | 10679 |
10458 format %{ "cmpq R12, $mem\t# ptr (R12_heapbase==0)" %} | 10680 format %{ "cmpq R12, $mem\t# ptr (R12_heapbase==0)" %} |
10459 ins_encode %{ | 10681 ins_encode %{ |
10460 __ cmpq(r12, $mem$$Address); | 10682 __ cmpq(r12, $mem$$Address); |
10501 __ cmp_narrow_oop($mem$$Address, (jobject)$src$$constant); | 10723 __ cmp_narrow_oop($mem$$Address, (jobject)$src$$constant); |
10502 %} | 10724 %} |
10503 ins_pipe(ialu_cr_reg_mem); | 10725 ins_pipe(ialu_cr_reg_mem); |
10504 %} | 10726 %} |
10505 | 10727 |
10728 instruct compN_rReg_imm_klass(rFlagsRegU cr, rRegN op1, immNKlass op2) %{ | |
10729 match(Set cr (CmpN op1 op2)); | |
10730 | |
10731 format %{ "cmpl $op1, $op2\t# compressed klass ptr" %} | |
10732 ins_encode %{ | |
10733 __ cmp_narrow_klass($op1$$Register, (Klass*)$op2$$constant); | |
10734 %} | |
10735 ins_pipe(ialu_cr_reg_imm); | |
10736 %} | |
10737 | |
10738 instruct compN_mem_imm_klass(rFlagsRegU cr, memory mem, immNKlass src) | |
10739 %{ | |
10740 match(Set cr (CmpN src (LoadNKlass mem))); | |
10741 | |
10742 format %{ "cmpl $mem, $src\t# compressed klass ptr" %} | |
10743 ins_encode %{ | |
10744 __ cmp_narrow_klass($mem$$Address, (Klass*)$src$$constant); | |
10745 %} | |
10746 ins_pipe(ialu_cr_reg_mem); | |
10747 %} | |
10748 | |
10506 instruct testN_reg(rFlagsReg cr, rRegN src, immN0 zero) %{ | 10749 instruct testN_reg(rFlagsReg cr, rRegN src, immN0 zero) %{ |
10507 match(Set cr (CmpN src zero)); | 10750 match(Set cr (CmpN src zero)); |
10508 | 10751 |
10509 format %{ "testl $src, $src\t# compressed ptr" %} | 10752 format %{ "testl $src, $src\t# compressed ptr" %} |
10510 ins_encode %{ __ testl($src$$Register, $src$$Register); %} | 10753 ins_encode %{ __ testl($src$$Register, $src$$Register); %} |
10524 ins_pipe(ialu_cr_reg_mem); | 10767 ins_pipe(ialu_cr_reg_mem); |
10525 %} | 10768 %} |
10526 | 10769 |
10527 instruct testN_mem_reg0(rFlagsReg cr, memory mem, immN0 zero) | 10770 instruct testN_mem_reg0(rFlagsReg cr, memory mem, immN0 zero) |
10528 %{ | 10771 %{ |
10529 predicate(Universe::narrow_oop_base() == NULL); | 10772 predicate(Universe::narrow_oop_base() == NULL && (Universe::narrow_klass_base() == NULL)); |
10530 match(Set cr (CmpN (LoadN mem) zero)); | 10773 match(Set cr (CmpN (LoadN mem) zero)); |
10531 | 10774 |
10532 format %{ "cmpl R12, $mem\t# compressed ptr (R12_heapbase==0)" %} | 10775 format %{ "cmpl R12, $mem\t# compressed ptr (R12_heapbase==0)" %} |
10533 ins_encode %{ | 10776 ins_encode %{ |
10534 __ cmpl(r12, $mem$$Address); | 10777 __ cmpl(r12, $mem$$Address); |