Mercurial > hg > truffle
comparison src/cpu/x86/vm/assembler_x86.cpp @ 8042:91a23b11d8dc
8007708: compiler/6855215 assert(VM_Version::supports_sse4_2())
Summary: Added missing UseSSE42 check. Also added missing avx2 assert for vpermq instruction.
Reviewed-by: roland, twisti
author | kvn |
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date | Fri, 08 Feb 2013 15:07:17 -0800 |
parents | 8391fdd36e1f |
children | 5fc51c1ecdeb cc32ccaaf47f |
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8020:1a0174612b49 | 8042:91a23b11d8dc |
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2268 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); | 2268 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
2269 emit_vex_arith(0x67, dst, nds, src, VEX_SIMD_66, vector256); | 2269 emit_vex_arith(0x67, dst, nds, src, VEX_SIMD_66, vector256); |
2270 } | 2270 } |
2271 | 2271 |
2272 void Assembler::vpermq(XMMRegister dst, XMMRegister src, int imm8, bool vector256) { | 2272 void Assembler::vpermq(XMMRegister dst, XMMRegister src, int imm8, bool vector256) { |
2273 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, true, vector256); | 2273 assert(VM_Version::supports_avx2(), ""); |
2274 emit_int8(0x00); | 2274 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, true, vector256); |
2275 emit_int8(0xC0 | encode); | 2275 emit_int8(0x00); |
2276 emit_int8(imm8); | 2276 emit_int8(0xC0 | encode); |
2277 emit_int8(imm8); | |
2277 } | 2278 } |
2278 | 2279 |
2279 void Assembler::pcmpestri(XMMRegister dst, Address src, int imm8) { | 2280 void Assembler::pcmpestri(XMMRegister dst, Address src, int imm8) { |
2280 assert(VM_Version::supports_sse4_2(), ""); | 2281 assert(VM_Version::supports_sse4_2(), ""); |
2281 InstructionMark im(this); | 2282 InstructionMark im(this); |