Mercurial > hg > truffle
comparison src/cpu/x86/vm/assembler_x86.cpp @ 6275:957c266d8bc5
Merge with http://hg.openjdk.java.net/hsx/hsx24/hotspot/
author | Doug Simon <doug.simon@oracle.com> |
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date | Tue, 21 Aug 2012 10:39:19 +0200 |
parents | 33df1aeaebbf 1d7922586cf6 |
children | c38f13903fdf |
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5891:fd8832ae511d | 6275:957c266d8bc5 |
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39 #include "gc_implementation/g1/g1CollectedHeap.inline.hpp" | 39 #include "gc_implementation/g1/g1CollectedHeap.inline.hpp" |
40 #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" | 40 #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" |
41 #include "gc_implementation/g1/heapRegion.hpp" | 41 #include "gc_implementation/g1/heapRegion.hpp" |
42 #endif | 42 #endif |
43 | 43 |
44 #ifdef PRODUCT | |
45 #define BLOCK_COMMENT(str) /* nothing */ | |
46 #define STOP(error) stop(error) | |
47 #else | |
48 #define BLOCK_COMMENT(str) block_comment(str) | |
49 #define STOP(error) block_comment(error); stop(error) | |
50 #endif | |
51 | |
52 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":") | |
44 // Implementation of AddressLiteral | 53 // Implementation of AddressLiteral |
45 | 54 |
46 AddressLiteral::AddressLiteral(address target, relocInfo::relocType rtype) { | 55 AddressLiteral::AddressLiteral(address target, relocInfo::relocType rtype) { |
47 _is_lval = false; | 56 _is_lval = false; |
48 _target = target; | 57 _target = target; |
526 | 535 |
527 case REP8(0xB8): // movl/q r, #32/#64(oop?) | 536 case REP8(0xB8): // movl/q r, #32/#64(oop?) |
528 if (which == end_pc_operand) return ip + (is_64bit ? 8 : 4); | 537 if (which == end_pc_operand) return ip + (is_64bit ? 8 : 4); |
529 // these asserts are somewhat nonsensical | 538 // these asserts are somewhat nonsensical |
530 #ifndef _LP64 | 539 #ifndef _LP64 |
531 assert(which == imm_operand || which == disp32_operand, ""); | 540 assert(which == imm_operand || which == disp32_operand, |
541 err_msg("which %d is_64_bit %d ip " INTPTR_FORMAT, which, is_64bit, ip)); | |
532 #else | 542 #else |
533 assert((which == call32_operand || which == imm_operand) && is_64bit || | 543 assert((which == call32_operand || which == imm_operand) && is_64bit || |
534 which == narrow_oop_operand && !is_64bit, ""); | 544 which == narrow_oop_operand && !is_64bit, |
545 err_msg("which %d is_64_bit %d ip " INTPTR_FORMAT, which, is_64bit, ip)); | |
535 #endif // _LP64 | 546 #endif // _LP64 |
536 return ip; | 547 return ip; |
537 | 548 |
538 case 0x69: // imul r, a, #32 | 549 case 0x69: // imul r, a, #32 |
539 case 0xC7: // movl a, #32(oop?) | 550 case 0xC7: // movl a, #32(oop?) |
1633 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_NONE); | 1644 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_NONE); |
1634 emit_byte(0x28); | 1645 emit_byte(0x28); |
1635 emit_byte(0xC0 | encode); | 1646 emit_byte(0xC0 | encode); |
1636 } | 1647 } |
1637 | 1648 |
1649 void Assembler::movlhps(XMMRegister dst, XMMRegister src) { | |
1650 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
1651 int encode = simd_prefix_and_encode(dst, src, src, VEX_SIMD_NONE); | |
1652 emit_byte(0x16); | |
1653 emit_byte(0xC0 | encode); | |
1654 } | |
1655 | |
1638 void Assembler::movb(Register dst, Address src) { | 1656 void Assembler::movb(Register dst, Address src) { |
1639 NOT_LP64(assert(dst->has_byte_register(), "must have byte register")); | 1657 NOT_LP64(assert(dst->has_byte_register(), "must have byte register")); |
1640 InstructionMark im(this); | 1658 InstructionMark im(this); |
1641 prefix(src, dst, true); | 1659 prefix(src, dst, true); |
1642 emit_byte(0x8A); | 1660 emit_byte(0x8A); |
1682 simd_prefix(dst, src, VEX_SIMD_66); | 1700 simd_prefix(dst, src, VEX_SIMD_66); |
1683 emit_byte(0x6E); | 1701 emit_byte(0x6E); |
1684 emit_operand(dst, src); | 1702 emit_operand(dst, src); |
1685 } | 1703 } |
1686 | 1704 |
1705 void Assembler::movdl(Address dst, XMMRegister src) { | |
1706 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
1707 InstructionMark im(this); | |
1708 simd_prefix(dst, src, VEX_SIMD_66); | |
1709 emit_byte(0x7E); | |
1710 emit_operand(src, dst); | |
1711 } | |
1712 | |
1687 void Assembler::movdqa(XMMRegister dst, XMMRegister src) { | 1713 void Assembler::movdqa(XMMRegister dst, XMMRegister src) { |
1688 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | 1714 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
1689 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_66); | 1715 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_66); |
1690 emit_byte(0x6F); | 1716 emit_byte(0x6F); |
1691 emit_byte(0xC0 | encode); | 1717 emit_byte(0xC0 | encode); |
1708 | 1734 |
1709 void Assembler::movdqu(Address dst, XMMRegister src) { | 1735 void Assembler::movdqu(Address dst, XMMRegister src) { |
1710 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | 1736 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
1711 InstructionMark im(this); | 1737 InstructionMark im(this); |
1712 simd_prefix(dst, src, VEX_SIMD_F3); | 1738 simd_prefix(dst, src, VEX_SIMD_F3); |
1739 emit_byte(0x7F); | |
1740 emit_operand(src, dst); | |
1741 } | |
1742 | |
1743 // Move Unaligned 256bit Vector | |
1744 void Assembler::vmovdqu(XMMRegister dst, XMMRegister src) { | |
1745 assert(UseAVX, ""); | |
1746 bool vector256 = true; | |
1747 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_F3, vector256); | |
1748 emit_byte(0x6F); | |
1749 emit_byte(0xC0 | encode); | |
1750 } | |
1751 | |
1752 void Assembler::vmovdqu(XMMRegister dst, Address src) { | |
1753 assert(UseAVX, ""); | |
1754 InstructionMark im(this); | |
1755 bool vector256 = true; | |
1756 vex_prefix(dst, xnoreg, src, VEX_SIMD_F3, vector256); | |
1757 emit_byte(0x6F); | |
1758 emit_operand(dst, src); | |
1759 } | |
1760 | |
1761 void Assembler::vmovdqu(Address dst, XMMRegister src) { | |
1762 assert(UseAVX, ""); | |
1763 InstructionMark im(this); | |
1764 bool vector256 = true; | |
1765 // swap src<->dst for encoding | |
1766 assert(src != xnoreg, "sanity"); | |
1767 vex_prefix(src, xnoreg, dst, VEX_SIMD_F3, vector256); | |
1713 emit_byte(0x7F); | 1768 emit_byte(0x7F); |
1714 emit_operand(src, dst); | 1769 emit_operand(src, dst); |
1715 } | 1770 } |
1716 | 1771 |
1717 // Uses zero extension on 64bit | 1772 // Uses zero extension on 64bit |
2525 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66); | 2580 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66); |
2526 emit_byte(0x62); | 2581 emit_byte(0x62); |
2527 emit_byte(0xC0 | encode); | 2582 emit_byte(0xC0 | encode); |
2528 } | 2583 } |
2529 | 2584 |
2585 void Assembler::punpcklqdq(XMMRegister dst, XMMRegister src) { | |
2586 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
2587 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66); | |
2588 emit_byte(0x6C); | |
2589 emit_byte(0xC0 | encode); | |
2590 } | |
2591 | |
2530 void Assembler::push(int32_t imm32) { | 2592 void Assembler::push(int32_t imm32) { |
2531 // in 64bits we push 64bits onto the stack but only | 2593 // in 64bits we push 64bits onto the stack but only |
2532 // take a 32bit immediate | 2594 // take a 32bit immediate |
2533 emit_byte(0x68); | 2595 emit_byte(0x68); |
2534 emit_long(imm32); | 2596 emit_long(imm32); |
3108 vex_prefix(dst, nds, src, VEX_SIMD_66); // 128-bit vector | 3170 vex_prefix(dst, nds, src, VEX_SIMD_66); // 128-bit vector |
3109 emit_byte(0x57); | 3171 emit_byte(0x57); |
3110 emit_operand(dst, src); | 3172 emit_operand(dst, src); |
3111 } | 3173 } |
3112 | 3174 |
3175 void Assembler::vxorpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { | |
3176 assert(VM_Version::supports_avx(), ""); | |
3177 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256); | |
3178 emit_byte(0x57); | |
3179 emit_byte(0xC0 | encode); | |
3180 } | |
3181 | |
3113 void Assembler::vxorps(XMMRegister dst, XMMRegister nds, Address src) { | 3182 void Assembler::vxorps(XMMRegister dst, XMMRegister nds, Address src) { |
3114 assert(VM_Version::supports_avx(), ""); | 3183 assert(VM_Version::supports_avx(), ""); |
3115 InstructionMark im(this); | 3184 InstructionMark im(this); |
3116 vex_prefix(dst, nds, src, VEX_SIMD_NONE); // 128-bit vector | 3185 vex_prefix(dst, nds, src, VEX_SIMD_NONE); // 128-bit vector |
3117 emit_byte(0x57); | 3186 emit_byte(0x57); |
3118 emit_operand(dst, src); | 3187 emit_operand(dst, src); |
3188 } | |
3189 | |
3190 void Assembler::vxorps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { | |
3191 assert(VM_Version::supports_avx(), ""); | |
3192 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_NONE, vector256); | |
3193 emit_byte(0x57); | |
3194 emit_byte(0xC0 | encode); | |
3195 } | |
3196 | |
3197 void Assembler::vpxor(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { | |
3198 assert(VM_Version::supports_avx2() || (!vector256) && VM_Version::supports_avx(), ""); | |
3199 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256); | |
3200 emit_byte(0xEF); | |
3201 emit_byte(0xC0 | encode); | |
3202 } | |
3203 | |
3204 void Assembler::vinsertf128h(XMMRegister dst, XMMRegister nds, XMMRegister src) { | |
3205 assert(VM_Version::supports_avx(), ""); | |
3206 bool vector256 = true; | |
3207 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A); | |
3208 emit_byte(0x18); | |
3209 emit_byte(0xC0 | encode); | |
3210 // 0x00 - insert into lower 128 bits | |
3211 // 0x01 - insert into upper 128 bits | |
3212 emit_byte(0x01); | |
3213 } | |
3214 | |
3215 void Assembler::vinserti128h(XMMRegister dst, XMMRegister nds, XMMRegister src) { | |
3216 assert(VM_Version::supports_avx2(), ""); | |
3217 bool vector256 = true; | |
3218 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A); | |
3219 emit_byte(0x38); | |
3220 emit_byte(0xC0 | encode); | |
3221 // 0x00 - insert into lower 128 bits | |
3222 // 0x01 - insert into upper 128 bits | |
3223 emit_byte(0x01); | |
3224 } | |
3225 | |
3226 void Assembler::vzeroupper() { | |
3227 assert(VM_Version::supports_avx(), ""); | |
3228 (void)vex_prefix_and_encode(xmm0, xmm0, xmm0, VEX_SIMD_NONE); | |
3229 emit_byte(0x77); | |
3119 } | 3230 } |
3120 | 3231 |
3121 | 3232 |
3122 #ifndef _LP64 | 3233 #ifndef _LP64 |
3123 // 32bit only pieces of the assembler | 3234 // 32bit only pieces of the assembler |
3572 } | 3683 } |
3573 | 3684 |
3574 void Assembler::fyl2x() { | 3685 void Assembler::fyl2x() { |
3575 emit_byte(0xD9); | 3686 emit_byte(0xD9); |
3576 emit_byte(0xF1); | 3687 emit_byte(0xF1); |
3688 } | |
3689 | |
3690 void Assembler::frndint() { | |
3691 emit_byte(0xD9); | |
3692 emit_byte(0xFC); | |
3693 } | |
3694 | |
3695 void Assembler::f2xm1() { | |
3696 emit_byte(0xD9); | |
3697 emit_byte(0xF0); | |
3698 } | |
3699 | |
3700 void Assembler::fldl2e() { | |
3701 emit_byte(0xD9); | |
3702 emit_byte(0xEA); | |
3577 } | 3703 } |
3578 | 3704 |
3579 // SSE SIMD prefix byte values corresponding to VexSimdPrefix encoding. | 3705 // SSE SIMD prefix byte values corresponding to VexSimdPrefix encoding. |
3580 static int simd_pre[4] = { 0, 0x66, 0xF3, 0xF2 }; | 3706 static int simd_pre[4] = { 0, 0x66, 0xF3, 0xF2 }; |
3581 // SSE opcode second byte values (first is 0x0F) corresponding to VexOpcode encoding. | 3707 // SSE opcode second byte values (first is 0x0F) corresponding to VexOpcode encoding. |
5389 BytecodeCounter::print(); | 5515 BytecodeCounter::print(); |
5390 } | 5516 } |
5391 // To see where a verify_oop failed, get $ebx+40/X for this frame. | 5517 // To see where a verify_oop failed, get $ebx+40/X for this frame. |
5392 // This is the value of eip which points to where verify_oop will return. | 5518 // This is the value of eip which points to where verify_oop will return. |
5393 if (os::message_box(msg, "Execution stopped, print registers?")) { | 5519 if (os::message_box(msg, "Execution stopped, print registers?")) { |
5394 ttyLocker ttyl; | 5520 print_state32(rdi, rsi, rbp, rsp, rbx, rdx, rcx, rax, eip); |
5395 tty->print_cr("eip = 0x%08x", eip); | |
5396 #ifndef PRODUCT | |
5397 if ((WizardMode || Verbose) && PrintMiscellaneous) { | |
5398 tty->cr(); | |
5399 findpc(eip); | |
5400 tty->cr(); | |
5401 } | |
5402 #endif | |
5403 tty->print_cr("rax = 0x%08x", rax); | |
5404 tty->print_cr("rbx = 0x%08x", rbx); | |
5405 tty->print_cr("rcx = 0x%08x", rcx); | |
5406 tty->print_cr("rdx = 0x%08x", rdx); | |
5407 tty->print_cr("rdi = 0x%08x", rdi); | |
5408 tty->print_cr("rsi = 0x%08x", rsi); | |
5409 tty->print_cr("rbp = 0x%08x", rbp); | |
5410 tty->print_cr("rsp = 0x%08x", rsp); | |
5411 BREAKPOINT; | 5521 BREAKPOINT; |
5412 assert(false, "start up GDB"); | 5522 assert(false, "start up GDB"); |
5413 } | 5523 } |
5414 } else { | 5524 } else { |
5415 ttyLocker ttyl; | 5525 ttyLocker ttyl; |
5416 ::tty->print_cr("=============== DEBUG MESSAGE: %s ================\n", msg); | 5526 ::tty->print_cr("=============== DEBUG MESSAGE: %s ================\n", msg); |
5417 assert(false, err_msg("DEBUG MESSAGE: %s", msg)); | 5527 assert(false, err_msg("DEBUG MESSAGE: %s", msg)); |
5418 } | 5528 } |
5419 ThreadStateTransition::transition(thread, _thread_in_vm, saved_state); | 5529 ThreadStateTransition::transition(thread, _thread_in_vm, saved_state); |
5530 } | |
5531 | |
5532 void MacroAssembler::print_state32(int rdi, int rsi, int rbp, int rsp, int rbx, int rdx, int rcx, int rax, int eip) { | |
5533 ttyLocker ttyl; | |
5534 FlagSetting fs(Debugging, true); | |
5535 tty->print_cr("eip = 0x%08x", eip); | |
5536 #ifndef PRODUCT | |
5537 if ((WizardMode || Verbose) && PrintMiscellaneous) { | |
5538 tty->cr(); | |
5539 findpc(eip); | |
5540 tty->cr(); | |
5541 } | |
5542 #endif | |
5543 #define PRINT_REG(rax) \ | |
5544 { tty->print("%s = ", #rax); os::print_location(tty, rax); } | |
5545 PRINT_REG(rax); | |
5546 PRINT_REG(rbx); | |
5547 PRINT_REG(rcx); | |
5548 PRINT_REG(rdx); | |
5549 PRINT_REG(rdi); | |
5550 PRINT_REG(rsi); | |
5551 PRINT_REG(rbp); | |
5552 PRINT_REG(rsp); | |
5553 #undef PRINT_REG | |
5554 // Print some words near top of staack. | |
5555 int* dump_sp = (int*) rsp; | |
5556 for (int col1 = 0; col1 < 8; col1++) { | |
5557 tty->print("(rsp+0x%03x) 0x%08x: ", (int)((intptr_t)dump_sp - (intptr_t)rsp), (intptr_t)dump_sp); | |
5558 os::print_location(tty, *dump_sp++); | |
5559 } | |
5560 for (int row = 0; row < 16; row++) { | |
5561 tty->print("(rsp+0x%03x) 0x%08x: ", (int)((intptr_t)dump_sp - (intptr_t)rsp), (intptr_t)dump_sp); | |
5562 for (int col = 0; col < 8; col++) { | |
5563 tty->print(" 0x%08x", *dump_sp++); | |
5564 } | |
5565 tty->cr(); | |
5566 } | |
5567 // Print some instructions around pc: | |
5568 Disassembler::decode((address)eip-64, (address)eip); | |
5569 tty->print_cr("--------"); | |
5570 Disassembler::decode((address)eip, (address)eip+32); | |
5420 } | 5571 } |
5421 | 5572 |
5422 void MacroAssembler::stop(const char* msg) { | 5573 void MacroAssembler::stop(const char* msg) { |
5423 ExternalAddress message((address)msg); | 5574 ExternalAddress message((address)msg); |
5424 // push address of message | 5575 // push address of message |
5425 pushptr(message.addr()); | 5576 pushptr(message.addr()); |
5426 { Label L; call(L, relocInfo::none); bind(L); } // push eip | 5577 { Label L; call(L, relocInfo::none); bind(L); } // push eip |
5427 pusha(); // push registers | 5578 pusha(); // push registers |
5428 call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug32))); | 5579 call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug32))); |
5429 hlt(); | 5580 hlt(); |
5430 } | 5581 } |
5431 | 5582 |
5432 void MacroAssembler::warn(const char* msg) { | 5583 void MacroAssembler::warn(const char* msg) { |
5437 pushptr(message.addr()); | 5588 pushptr(message.addr()); |
5438 | 5589 |
5439 call(RuntimeAddress(CAST_FROM_FN_PTR(address, warning))); | 5590 call(RuntimeAddress(CAST_FROM_FN_PTR(address, warning))); |
5440 addl(rsp, wordSize); // discard argument | 5591 addl(rsp, wordSize); // discard argument |
5441 pop_CPU_state(); | 5592 pop_CPU_state(); |
5593 } | |
5594 | |
5595 void MacroAssembler::print_state() { | |
5596 { Label L; call(L, relocInfo::none); bind(L); } // push eip | |
5597 pusha(); // push registers | |
5598 | |
5599 push_CPU_state(); | |
5600 call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::print_state32))); | |
5601 pop_CPU_state(); | |
5602 | |
5603 popa(); | |
5604 addl(rsp, wordSize); | |
5442 } | 5605 } |
5443 | 5606 |
5444 #else // _LP64 | 5607 #else // _LP64 |
5445 | 5608 |
5446 // 64 bit versions | 5609 // 64 bit versions |
5904 call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug64))); | 6067 call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug64))); |
5905 hlt(); | 6068 hlt(); |
5906 } | 6069 } |
5907 | 6070 |
5908 void MacroAssembler::warn(const char* msg) { | 6071 void MacroAssembler::warn(const char* msg) { |
5909 push(rsp); | 6072 push(rbp); |
6073 movq(rbp, rsp); | |
5910 andq(rsp, -16); // align stack as required by push_CPU_state and call | 6074 andq(rsp, -16); // align stack as required by push_CPU_state and call |
5911 | |
5912 push_CPU_state(); // keeps alignment at 16 bytes | 6075 push_CPU_state(); // keeps alignment at 16 bytes |
5913 lea(c_rarg0, ExternalAddress((address) msg)); | 6076 lea(c_rarg0, ExternalAddress((address) msg)); |
5914 call_VM_leaf(CAST_FROM_FN_PTR(address, warning), c_rarg0); | 6077 call_VM_leaf(CAST_FROM_FN_PTR(address, warning), c_rarg0); |
5915 pop_CPU_state(); | 6078 pop_CPU_state(); |
5916 pop(rsp); | 6079 mov(rsp, rbp); |
6080 pop(rbp); | |
6081 } | |
6082 | |
6083 void MacroAssembler::print_state() { | |
6084 address rip = pc(); | |
6085 pusha(); // get regs on stack | |
6086 push(rbp); | |
6087 movq(rbp, rsp); | |
6088 andq(rsp, -16); // align stack as required by push_CPU_state and call | |
6089 push_CPU_state(); // keeps alignment at 16 bytes | |
6090 | |
6091 lea(c_rarg0, InternalAddress(rip)); | |
6092 lea(c_rarg1, Address(rbp, wordSize)); // pass pointer to regs array | |
6093 call_VM_leaf(CAST_FROM_FN_PTR(address, MacroAssembler::print_state64), c_rarg0, c_rarg1); | |
6094 | |
6095 pop_CPU_state(); | |
6096 mov(rsp, rbp); | |
6097 pop(rbp); | |
6098 popa(); | |
5917 } | 6099 } |
5918 | 6100 |
5919 #ifndef PRODUCT | 6101 #ifndef PRODUCT |
5920 extern "C" void findpc(intptr_t x); | 6102 extern "C" void findpc(intptr_t x); |
5921 #endif | 6103 #endif |
5922 | 6104 |
5923 void MacroAssembler::debug64(char* msg, int64_t pc, int64_t regs[]) { | 6105 void MacroAssembler::debug64(char* msg, int64_t pc, int64_t regs[]) { |
5924 // In order to get locks to work, we need to fake a in_VM state | 6106 // In order to get locks to work, we need to fake a in_VM state |
5925 if (ShowMessageBoxOnError ) { | 6107 if (ShowMessageBoxOnError) { |
5926 JavaThread* thread = JavaThread::current(); | 6108 JavaThread* thread = JavaThread::current(); |
5927 JavaThreadState saved_state = thread->thread_state(); | 6109 JavaThreadState saved_state = thread->thread_state(); |
5928 thread->set_thread_state(_thread_in_vm); | 6110 thread->set_thread_state(_thread_in_vm); |
5929 #ifndef PRODUCT | 6111 #ifndef PRODUCT |
5930 if (CountBytecodes || TraceBytecodes || StopInterpreterAt) { | 6112 if (CountBytecodes || TraceBytecodes || StopInterpreterAt) { |
5934 #endif | 6116 #endif |
5935 // To see where a verify_oop failed, get $ebx+40/X for this frame. | 6117 // To see where a verify_oop failed, get $ebx+40/X for this frame. |
5936 // XXX correct this offset for amd64 | 6118 // XXX correct this offset for amd64 |
5937 // This is the value of eip which points to where verify_oop will return. | 6119 // This is the value of eip which points to where verify_oop will return. |
5938 if (os::message_box(msg, "Execution stopped, print registers?")) { | 6120 if (os::message_box(msg, "Execution stopped, print registers?")) { |
5939 ttyLocker ttyl; | 6121 print_state64(pc, regs); |
5940 tty->print_cr("rip = 0x%016lx", pc); | |
5941 #ifndef PRODUCT | |
5942 tty->cr(); | |
5943 findpc(pc); | |
5944 tty->cr(); | |
5945 #endif | |
5946 tty->print_cr("rax = 0x%016lx", regs[15]); | |
5947 tty->print_cr("rbx = 0x%016lx", regs[12]); | |
5948 tty->print_cr("rcx = 0x%016lx", regs[14]); | |
5949 tty->print_cr("rdx = 0x%016lx", regs[13]); | |
5950 tty->print_cr("rdi = 0x%016lx", regs[8]); | |
5951 tty->print_cr("rsi = 0x%016lx", regs[9]); | |
5952 tty->print_cr("rbp = 0x%016lx", regs[10]); | |
5953 tty->print_cr("rsp = 0x%016lx", regs[11]); | |
5954 tty->print_cr("r8 = 0x%016lx", regs[7]); | |
5955 tty->print_cr("r9 = 0x%016lx", regs[6]); | |
5956 tty->print_cr("r10 = 0x%016lx", regs[5]); | |
5957 tty->print_cr("r11 = 0x%016lx", regs[4]); | |
5958 tty->print_cr("r12 = 0x%016lx", regs[3]); | |
5959 tty->print_cr("r13 = 0x%016lx", regs[2]); | |
5960 tty->print_cr("r14 = 0x%016lx", regs[1]); | |
5961 tty->print_cr("r15 = 0x%016lx", regs[0]); | |
5962 BREAKPOINT; | 6122 BREAKPOINT; |
6123 assert(false, "start up GDB"); | |
5963 } | 6124 } |
5964 ThreadStateTransition::transition(thread, _thread_in_vm, saved_state); | 6125 ThreadStateTransition::transition(thread, _thread_in_vm, saved_state); |
5965 } else { | 6126 } else { |
5966 ttyLocker ttyl; | 6127 ttyLocker ttyl; |
5967 ::tty->print_cr("=============== DEBUG MESSAGE: %s ================\n", | 6128 ::tty->print_cr("=============== DEBUG MESSAGE: %s ================\n", |
5968 msg); | 6129 msg); |
5969 assert(false, err_msg("DEBUG MESSAGE: %s", msg)); | 6130 assert(false, err_msg("DEBUG MESSAGE: %s", msg)); |
5970 } | 6131 } |
6132 } | |
6133 | |
6134 void MacroAssembler::print_state64(int64_t pc, int64_t regs[]) { | |
6135 ttyLocker ttyl; | |
6136 FlagSetting fs(Debugging, true); | |
6137 tty->print_cr("rip = 0x%016lx", pc); | |
6138 #ifndef PRODUCT | |
6139 tty->cr(); | |
6140 findpc(pc); | |
6141 tty->cr(); | |
6142 #endif | |
6143 #define PRINT_REG(rax, value) \ | |
6144 { tty->print("%s = ", #rax); os::print_location(tty, value); } | |
6145 PRINT_REG(rax, regs[15]); | |
6146 PRINT_REG(rbx, regs[12]); | |
6147 PRINT_REG(rcx, regs[14]); | |
6148 PRINT_REG(rdx, regs[13]); | |
6149 PRINT_REG(rdi, regs[8]); | |
6150 PRINT_REG(rsi, regs[9]); | |
6151 PRINT_REG(rbp, regs[10]); | |
6152 PRINT_REG(rsp, regs[11]); | |
6153 PRINT_REG(r8 , regs[7]); | |
6154 PRINT_REG(r9 , regs[6]); | |
6155 PRINT_REG(r10, regs[5]); | |
6156 PRINT_REG(r11, regs[4]); | |
6157 PRINT_REG(r12, regs[3]); | |
6158 PRINT_REG(r13, regs[2]); | |
6159 PRINT_REG(r14, regs[1]); | |
6160 PRINT_REG(r15, regs[0]); | |
6161 #undef PRINT_REG | |
6162 // Print some words near top of staack. | |
6163 int64_t* rsp = (int64_t*) regs[11]; | |
6164 int64_t* dump_sp = rsp; | |
6165 for (int col1 = 0; col1 < 8; col1++) { | |
6166 tty->print("(rsp+0x%03x) 0x%016lx: ", (int)((intptr_t)dump_sp - (intptr_t)rsp), (int64_t)dump_sp); | |
6167 os::print_location(tty, *dump_sp++); | |
6168 } | |
6169 for (int row = 0; row < 25; row++) { | |
6170 tty->print("(rsp+0x%03x) 0x%016lx: ", (int)((intptr_t)dump_sp - (intptr_t)rsp), (int64_t)dump_sp); | |
6171 for (int col = 0; col < 4; col++) { | |
6172 tty->print(" 0x%016lx", *dump_sp++); | |
6173 } | |
6174 tty->cr(); | |
6175 } | |
6176 // Print some instructions around pc: | |
6177 Disassembler::decode((address)pc-64, (address)pc); | |
6178 tty->print_cr("--------"); | |
6179 Disassembler::decode((address)pc, (address)pc+32); | |
5971 } | 6180 } |
5972 | 6181 |
5973 #endif // _LP64 | 6182 #endif // _LP64 |
5974 | 6183 |
5975 // Now versions that are common to 32/64 bit | 6184 // Now versions that are common to 32/64 bit |
6337 push(rax); | 6546 push(rax); |
6338 { Label L; | 6547 { Label L; |
6339 get_thread(rax); | 6548 get_thread(rax); |
6340 cmpptr(java_thread, rax); | 6549 cmpptr(java_thread, rax); |
6341 jcc(Assembler::equal, L); | 6550 jcc(Assembler::equal, L); |
6342 stop("MacroAssembler::call_VM_base: rdi not callee saved?"); | 6551 STOP("MacroAssembler::call_VM_base: rdi not callee saved?"); |
6343 bind(L); | 6552 bind(L); |
6344 } | 6553 } |
6345 pop(rax); | 6554 pop(rax); |
6346 #endif | 6555 #endif |
6347 } else { | 6556 } else { |
6864 | 7073 |
6865 void MacroAssembler::fldcw(AddressLiteral src) { | 7074 void MacroAssembler::fldcw(AddressLiteral src) { |
6866 Assembler::fldcw(as_Address(src)); | 7075 Assembler::fldcw(as_Address(src)); |
6867 } | 7076 } |
6868 | 7077 |
7078 void MacroAssembler::pow_exp_core_encoding() { | |
7079 // kills rax, rcx, rdx | |
7080 subptr(rsp,sizeof(jdouble)); | |
7081 // computes 2^X. Stack: X ... | |
7082 // f2xm1 computes 2^X-1 but only operates on -1<=X<=1. Get int(X) and | |
7083 // keep it on the thread's stack to compute 2^int(X) later | |
7084 // then compute 2^(X-int(X)) as (2^(X-int(X)-1+1) | |
7085 // final result is obtained with: 2^X = 2^int(X) * 2^(X-int(X)) | |
7086 fld_s(0); // Stack: X X ... | |
7087 frndint(); // Stack: int(X) X ... | |
7088 fsuba(1); // Stack: int(X) X-int(X) ... | |
7089 fistp_s(Address(rsp,0)); // move int(X) as integer to thread's stack. Stack: X-int(X) ... | |
7090 f2xm1(); // Stack: 2^(X-int(X))-1 ... | |
7091 fld1(); // Stack: 1 2^(X-int(X))-1 ... | |
7092 faddp(1); // Stack: 2^(X-int(X)) | |
7093 // computes 2^(int(X)): add exponent bias (1023) to int(X), then | |
7094 // shift int(X)+1023 to exponent position. | |
7095 // Exponent is limited to 11 bits if int(X)+1023 does not fit in 11 | |
7096 // bits, set result to NaN. 0x000 and 0x7FF are reserved exponent | |
7097 // values so detect them and set result to NaN. | |
7098 movl(rax,Address(rsp,0)); | |
7099 movl(rcx, -2048); // 11 bit mask and valid NaN binary encoding | |
7100 addl(rax, 1023); | |
7101 movl(rdx,rax); | |
7102 shll(rax,20); | |
7103 // Check that 0 < int(X)+1023 < 2047. Otherwise set rax to NaN. | |
7104 addl(rdx,1); | |
7105 // Check that 1 < int(X)+1023+1 < 2048 | |
7106 // in 3 steps: | |
7107 // 1- (int(X)+1023+1)&-2048 == 0 => 0 <= int(X)+1023+1 < 2048 | |
7108 // 2- (int(X)+1023+1)&-2048 != 0 | |
7109 // 3- (int(X)+1023+1)&-2048 != 1 | |
7110 // Do 2- first because addl just updated the flags. | |
7111 cmov32(Assembler::equal,rax,rcx); | |
7112 cmpl(rdx,1); | |
7113 cmov32(Assembler::equal,rax,rcx); | |
7114 testl(rdx,rcx); | |
7115 cmov32(Assembler::notEqual,rax,rcx); | |
7116 movl(Address(rsp,4),rax); | |
7117 movl(Address(rsp,0),0); | |
7118 fmul_d(Address(rsp,0)); // Stack: 2^X ... | |
7119 addptr(rsp,sizeof(jdouble)); | |
7120 } | |
7121 | |
7122 void MacroAssembler::increase_precision() { | |
7123 subptr(rsp, BytesPerWord); | |
7124 fnstcw(Address(rsp, 0)); | |
7125 movl(rax, Address(rsp, 0)); | |
7126 orl(rax, 0x300); | |
7127 push(rax); | |
7128 fldcw(Address(rsp, 0)); | |
7129 pop(rax); | |
7130 } | |
7131 | |
7132 void MacroAssembler::restore_precision() { | |
7133 fldcw(Address(rsp, 0)); | |
7134 addptr(rsp, BytesPerWord); | |
7135 } | |
7136 | |
7137 void MacroAssembler::fast_pow() { | |
7138 // computes X^Y = 2^(Y * log2(X)) | |
7139 // if fast computation is not possible, result is NaN. Requires | |
7140 // fallback from user of this macro. | |
7141 // increase precision for intermediate steps of the computation | |
7142 increase_precision(); | |
7143 fyl2x(); // Stack: (Y*log2(X)) ... | |
7144 pow_exp_core_encoding(); // Stack: exp(X) ... | |
7145 restore_precision(); | |
7146 } | |
7147 | |
7148 void MacroAssembler::fast_exp() { | |
7149 // computes exp(X) = 2^(X * log2(e)) | |
7150 // if fast computation is not possible, result is NaN. Requires | |
7151 // fallback from user of this macro. | |
7152 // increase precision for intermediate steps of the computation | |
7153 increase_precision(); | |
7154 fldl2e(); // Stack: log2(e) X ... | |
7155 fmulp(1); // Stack: (X*log2(e)) ... | |
7156 pow_exp_core_encoding(); // Stack: exp(X) ... | |
7157 restore_precision(); | |
7158 } | |
7159 | |
7160 void MacroAssembler::pow_or_exp(bool is_exp, int num_fpu_regs_in_use) { | |
7161 // kills rax, rcx, rdx | |
7162 // pow and exp needs 2 extra registers on the fpu stack. | |
7163 Label slow_case, done; | |
7164 Register tmp = noreg; | |
7165 if (!VM_Version::supports_cmov()) { | |
7166 // fcmp needs a temporary so preserve rdx, | |
7167 tmp = rdx; | |
7168 } | |
7169 Register tmp2 = rax; | |
7170 Register tmp3 = rcx; | |
7171 | |
7172 if (is_exp) { | |
7173 // Stack: X | |
7174 fld_s(0); // duplicate argument for runtime call. Stack: X X | |
7175 fast_exp(); // Stack: exp(X) X | |
7176 fcmp(tmp, 0, false, false); // Stack: exp(X) X | |
7177 // exp(X) not equal to itself: exp(X) is NaN go to slow case. | |
7178 jcc(Assembler::parity, slow_case); | |
7179 // get rid of duplicate argument. Stack: exp(X) | |
7180 if (num_fpu_regs_in_use > 0) { | |
7181 fxch(); | |
7182 fpop(); | |
7183 } else { | |
7184 ffree(1); | |
7185 } | |
7186 jmp(done); | |
7187 } else { | |
7188 // Stack: X Y | |
7189 Label x_negative, y_odd; | |
7190 | |
7191 fldz(); // Stack: 0 X Y | |
7192 fcmp(tmp, 1, true, false); // Stack: X Y | |
7193 jcc(Assembler::above, x_negative); | |
7194 | |
7195 // X >= 0 | |
7196 | |
7197 fld_s(1); // duplicate arguments for runtime call. Stack: Y X Y | |
7198 fld_s(1); // Stack: X Y X Y | |
7199 fast_pow(); // Stack: X^Y X Y | |
7200 fcmp(tmp, 0, false, false); // Stack: X^Y X Y | |
7201 // X^Y not equal to itself: X^Y is NaN go to slow case. | |
7202 jcc(Assembler::parity, slow_case); | |
7203 // get rid of duplicate arguments. Stack: X^Y | |
7204 if (num_fpu_regs_in_use > 0) { | |
7205 fxch(); fpop(); | |
7206 fxch(); fpop(); | |
7207 } else { | |
7208 ffree(2); | |
7209 ffree(1); | |
7210 } | |
7211 jmp(done); | |
7212 | |
7213 // X <= 0 | |
7214 bind(x_negative); | |
7215 | |
7216 fld_s(1); // Stack: Y X Y | |
7217 frndint(); // Stack: int(Y) X Y | |
7218 fcmp(tmp, 2, false, false); // Stack: int(Y) X Y | |
7219 jcc(Assembler::notEqual, slow_case); | |
7220 | |
7221 subptr(rsp, 8); | |
7222 | |
7223 // For X^Y, when X < 0, Y has to be an integer and the final | |
7224 // result depends on whether it's odd or even. We just checked | |
7225 // that int(Y) == Y. We move int(Y) to gp registers as a 64 bit | |
7226 // integer to test its parity. If int(Y) is huge and doesn't fit | |
7227 // in the 64 bit integer range, the integer indefinite value will | |
7228 // end up in the gp registers. Huge numbers are all even, the | |
7229 // integer indefinite number is even so it's fine. | |
7230 | |
7231 #ifdef ASSERT | |
7232 // Let's check we don't end up with an integer indefinite number | |
7233 // when not expected. First test for huge numbers: check whether | |
7234 // int(Y)+1 == int(Y) which is true for very large numbers and | |
7235 // those are all even. A 64 bit integer is guaranteed to not | |
7236 // overflow for numbers where y+1 != y (when precision is set to | |
7237 // double precision). | |
7238 Label y_not_huge; | |
7239 | |
7240 fld1(); // Stack: 1 int(Y) X Y | |
7241 fadd(1); // Stack: 1+int(Y) int(Y) X Y | |
7242 | |
7243 #ifdef _LP64 | |
7244 // trip to memory to force the precision down from double extended | |
7245 // precision | |
7246 fstp_d(Address(rsp, 0)); | |
7247 fld_d(Address(rsp, 0)); | |
7248 #endif | |
7249 | |
7250 fcmp(tmp, 1, true, false); // Stack: int(Y) X Y | |
7251 #endif | |
7252 | |
7253 // move int(Y) as 64 bit integer to thread's stack | |
7254 fistp_d(Address(rsp,0)); // Stack: X Y | |
7255 | |
7256 #ifdef ASSERT | |
7257 jcc(Assembler::notEqual, y_not_huge); | |
7258 | |
7259 // Y is huge so we know it's even. It may not fit in a 64 bit | |
7260 // integer and we don't want the debug code below to see the | |
7261 // integer indefinite value so overwrite int(Y) on the thread's | |
7262 // stack with 0. | |
7263 movl(Address(rsp, 0), 0); | |
7264 movl(Address(rsp, 4), 0); | |
7265 | |
7266 bind(y_not_huge); | |
7267 #endif | |
7268 | |
7269 fld_s(1); // duplicate arguments for runtime call. Stack: Y X Y | |
7270 fld_s(1); // Stack: X Y X Y | |
7271 fabs(); // Stack: abs(X) Y X Y | |
7272 fast_pow(); // Stack: abs(X)^Y X Y | |
7273 fcmp(tmp, 0, false, false); // Stack: abs(X)^Y X Y | |
7274 // abs(X)^Y not equal to itself: abs(X)^Y is NaN go to slow case. | |
7275 | |
7276 pop(tmp2); | |
7277 NOT_LP64(pop(tmp3)); | |
7278 jcc(Assembler::parity, slow_case); | |
7279 | |
7280 #ifdef ASSERT | |
7281 // Check that int(Y) is not integer indefinite value (int | |
7282 // overflow). Shouldn't happen because for values that would | |
7283 // overflow, 1+int(Y)==Y which was tested earlier. | |
7284 #ifndef _LP64 | |
7285 { | |
7286 Label integer; | |
7287 testl(tmp2, tmp2); | |
7288 jcc(Assembler::notZero, integer); | |
7289 cmpl(tmp3, 0x80000000); | |
7290 jcc(Assembler::notZero, integer); | |
7291 STOP("integer indefinite value shouldn't be seen here"); | |
7292 bind(integer); | |
7293 } | |
7294 #else | |
7295 { | |
7296 Label integer; | |
7297 mov(tmp3, tmp2); // preserve tmp2 for parity check below | |
7298 shlq(tmp3, 1); | |
7299 jcc(Assembler::carryClear, integer); | |
7300 jcc(Assembler::notZero, integer); | |
7301 STOP("integer indefinite value shouldn't be seen here"); | |
7302 bind(integer); | |
7303 } | |
7304 #endif | |
7305 #endif | |
7306 | |
7307 // get rid of duplicate arguments. Stack: X^Y | |
7308 if (num_fpu_regs_in_use > 0) { | |
7309 fxch(); fpop(); | |
7310 fxch(); fpop(); | |
7311 } else { | |
7312 ffree(2); | |
7313 ffree(1); | |
7314 } | |
7315 | |
7316 testl(tmp2, 1); | |
7317 jcc(Assembler::zero, done); // X <= 0, Y even: X^Y = abs(X)^Y | |
7318 // X <= 0, Y even: X^Y = -abs(X)^Y | |
7319 | |
7320 fchs(); // Stack: -abs(X)^Y Y | |
7321 jmp(done); | |
7322 } | |
7323 | |
7324 // slow case: runtime call | |
7325 bind(slow_case); | |
7326 | |
7327 fpop(); // pop incorrect result or int(Y) | |
7328 | |
7329 fp_runtime_fallback(is_exp ? CAST_FROM_FN_PTR(address, SharedRuntime::dexp) : CAST_FROM_FN_PTR(address, SharedRuntime::dpow), | |
7330 is_exp ? 1 : 2, num_fpu_regs_in_use); | |
7331 | |
7332 // Come here with result in F-TOS | |
7333 bind(done); | |
7334 } | |
7335 | |
6869 void MacroAssembler::fpop() { | 7336 void MacroAssembler::fpop() { |
6870 ffree(); | 7337 ffree(); |
6871 fincstp(); | 7338 fincstp(); |
6872 } | 7339 } |
6873 | 7340 |
7128 | 7595 |
7129 void MacroAssembler::movbyte(ArrayAddress dst, int src) { | 7596 void MacroAssembler::movbyte(ArrayAddress dst, int src) { |
7130 movb(as_Address(dst), src); | 7597 movb(as_Address(dst), src); |
7131 } | 7598 } |
7132 | 7599 |
7600 void MacroAssembler::movdl(XMMRegister dst, AddressLiteral src) { | |
7601 if (reachable(src)) { | |
7602 movdl(dst, as_Address(src)); | |
7603 } else { | |
7604 lea(rscratch1, src); | |
7605 movdl(dst, Address(rscratch1, 0)); | |
7606 } | |
7607 } | |
7608 | |
7609 void MacroAssembler::movq(XMMRegister dst, AddressLiteral src) { | |
7610 if (reachable(src)) { | |
7611 movq(dst, as_Address(src)); | |
7612 } else { | |
7613 lea(rscratch1, src); | |
7614 movq(dst, Address(rscratch1, 0)); | |
7615 } | |
7616 } | |
7617 | |
7133 void MacroAssembler::movdbl(XMMRegister dst, AddressLiteral src) { | 7618 void MacroAssembler::movdbl(XMMRegister dst, AddressLiteral src) { |
7134 if (reachable(src)) { | 7619 if (reachable(src)) { |
7135 if (UseXmmLoadAndClearUpper) { | 7620 if (UseXmmLoadAndClearUpper) { |
7136 movsd (dst, as_Address(src)); | 7621 movsd (dst, as_Address(src)); |
7137 } else { | 7622 } else { |
7993 push(tsize); | 8478 push(tsize); |
7994 movptr(tsize, Address(thread_reg, in_bytes(JavaThread::tlab_size_offset()))); | 8479 movptr(tsize, Address(thread_reg, in_bytes(JavaThread::tlab_size_offset()))); |
7995 shlptr(tsize, LogHeapWordSize); | 8480 shlptr(tsize, LogHeapWordSize); |
7996 cmpptr(t1, tsize); | 8481 cmpptr(t1, tsize); |
7997 jcc(Assembler::equal, ok); | 8482 jcc(Assembler::equal, ok); |
7998 stop("assert(t1 != tlab size)"); | 8483 STOP("assert(t1 != tlab size)"); |
7999 should_not_reach_here(); | 8484 should_not_reach_here(); |
8000 | 8485 |
8001 bind(ok); | 8486 bind(ok); |
8002 pop(tsize); | 8487 pop(tsize); |
8003 } | 8488 } |
8039 } else { | 8524 } else { |
8040 addl(Address(thread, in_bytes(JavaThread::allocated_bytes_offset())), con_size_in_bytes); | 8525 addl(Address(thread, in_bytes(JavaThread::allocated_bytes_offset())), con_size_in_bytes); |
8041 } | 8526 } |
8042 adcl(Address(thread, in_bytes(JavaThread::allocated_bytes_offset())+4), 0); | 8527 adcl(Address(thread, in_bytes(JavaThread::allocated_bytes_offset())+4), 0); |
8043 #endif | 8528 #endif |
8529 } | |
8530 | |
8531 void MacroAssembler::fp_runtime_fallback(address runtime_entry, int nb_args, int num_fpu_regs_in_use) { | |
8532 pusha(); | |
8533 | |
8534 // if we are coming from c1, xmm registers may be live | |
8535 if (UseSSE >= 1) { | |
8536 subptr(rsp, sizeof(jdouble)* LP64_ONLY(16) NOT_LP64(8)); | |
8537 } | |
8538 int off = 0; | |
8539 if (UseSSE == 1) { | |
8540 movflt(Address(rsp,off++*sizeof(jdouble)),xmm0); | |
8541 movflt(Address(rsp,off++*sizeof(jdouble)),xmm1); | |
8542 movflt(Address(rsp,off++*sizeof(jdouble)),xmm2); | |
8543 movflt(Address(rsp,off++*sizeof(jdouble)),xmm3); | |
8544 movflt(Address(rsp,off++*sizeof(jdouble)),xmm4); | |
8545 movflt(Address(rsp,off++*sizeof(jdouble)),xmm5); | |
8546 movflt(Address(rsp,off++*sizeof(jdouble)),xmm6); | |
8547 movflt(Address(rsp,off++*sizeof(jdouble)),xmm7); | |
8548 } else if (UseSSE >= 2) { | |
8549 movdbl(Address(rsp,off++*sizeof(jdouble)),xmm0); | |
8550 movdbl(Address(rsp,off++*sizeof(jdouble)),xmm1); | |
8551 movdbl(Address(rsp,off++*sizeof(jdouble)),xmm2); | |
8552 movdbl(Address(rsp,off++*sizeof(jdouble)),xmm3); | |
8553 movdbl(Address(rsp,off++*sizeof(jdouble)),xmm4); | |
8554 movdbl(Address(rsp,off++*sizeof(jdouble)),xmm5); | |
8555 movdbl(Address(rsp,off++*sizeof(jdouble)),xmm6); | |
8556 movdbl(Address(rsp,off++*sizeof(jdouble)),xmm7); | |
8557 #ifdef _LP64 | |
8558 movdbl(Address(rsp,off++*sizeof(jdouble)),xmm8); | |
8559 movdbl(Address(rsp,off++*sizeof(jdouble)),xmm9); | |
8560 movdbl(Address(rsp,off++*sizeof(jdouble)),xmm10); | |
8561 movdbl(Address(rsp,off++*sizeof(jdouble)),xmm11); | |
8562 movdbl(Address(rsp,off++*sizeof(jdouble)),xmm12); | |
8563 movdbl(Address(rsp,off++*sizeof(jdouble)),xmm13); | |
8564 movdbl(Address(rsp,off++*sizeof(jdouble)),xmm14); | |
8565 movdbl(Address(rsp,off++*sizeof(jdouble)),xmm15); | |
8566 #endif | |
8567 } | |
8568 | |
8569 // Preserve registers across runtime call | |
8570 int incoming_argument_and_return_value_offset = -1; | |
8571 if (num_fpu_regs_in_use > 1) { | |
8572 // Must preserve all other FPU regs (could alternatively convert | |
8573 // SharedRuntime::dsin, dcos etc. into assembly routines known not to trash | |
8574 // FPU state, but can not trust C compiler) | |
8575 NEEDS_CLEANUP; | |
8576 // NOTE that in this case we also push the incoming argument(s) to | |
8577 // the stack and restore it later; we also use this stack slot to | |
8578 // hold the return value from dsin, dcos etc. | |
8579 for (int i = 0; i < num_fpu_regs_in_use; i++) { | |
8580 subptr(rsp, sizeof(jdouble)); | |
8581 fstp_d(Address(rsp, 0)); | |
8582 } | |
8583 incoming_argument_and_return_value_offset = sizeof(jdouble)*(num_fpu_regs_in_use-1); | |
8584 for (int i = nb_args-1; i >= 0; i--) { | |
8585 fld_d(Address(rsp, incoming_argument_and_return_value_offset-i*sizeof(jdouble))); | |
8586 } | |
8587 } | |
8588 | |
8589 subptr(rsp, nb_args*sizeof(jdouble)); | |
8590 for (int i = 0; i < nb_args; i++) { | |
8591 fstp_d(Address(rsp, i*sizeof(jdouble))); | |
8592 } | |
8593 | |
8594 #ifdef _LP64 | |
8595 if (nb_args > 0) { | |
8596 movdbl(xmm0, Address(rsp, 0)); | |
8597 } | |
8598 if (nb_args > 1) { | |
8599 movdbl(xmm1, Address(rsp, sizeof(jdouble))); | |
8600 } | |
8601 assert(nb_args <= 2, "unsupported number of args"); | |
8602 #endif // _LP64 | |
8603 | |
8604 // NOTE: we must not use call_VM_leaf here because that requires a | |
8605 // complete interpreter frame in debug mode -- same bug as 4387334 | |
8606 // MacroAssembler::call_VM_leaf_base is perfectly safe and will | |
8607 // do proper 64bit abi | |
8608 | |
8609 NEEDS_CLEANUP; | |
8610 // Need to add stack banging before this runtime call if it needs to | |
8611 // be taken; however, there is no generic stack banging routine at | |
8612 // the MacroAssembler level | |
8613 | |
8614 MacroAssembler::call_VM_leaf_base(runtime_entry, 0); | |
8615 | |
8616 #ifdef _LP64 | |
8617 movsd(Address(rsp, 0), xmm0); | |
8618 fld_d(Address(rsp, 0)); | |
8619 #endif // _LP64 | |
8620 addptr(rsp, sizeof(jdouble) * nb_args); | |
8621 if (num_fpu_regs_in_use > 1) { | |
8622 // Must save return value to stack and then restore entire FPU | |
8623 // stack except incoming arguments | |
8624 fstp_d(Address(rsp, incoming_argument_and_return_value_offset)); | |
8625 for (int i = 0; i < num_fpu_regs_in_use - nb_args; i++) { | |
8626 fld_d(Address(rsp, 0)); | |
8627 addptr(rsp, sizeof(jdouble)); | |
8628 } | |
8629 fld_d(Address(rsp, (nb_args-1)*sizeof(jdouble))); | |
8630 addptr(rsp, sizeof(jdouble) * nb_args); | |
8631 } | |
8632 | |
8633 off = 0; | |
8634 if (UseSSE == 1) { | |
8635 movflt(xmm0, Address(rsp,off++*sizeof(jdouble))); | |
8636 movflt(xmm1, Address(rsp,off++*sizeof(jdouble))); | |
8637 movflt(xmm2, Address(rsp,off++*sizeof(jdouble))); | |
8638 movflt(xmm3, Address(rsp,off++*sizeof(jdouble))); | |
8639 movflt(xmm4, Address(rsp,off++*sizeof(jdouble))); | |
8640 movflt(xmm5, Address(rsp,off++*sizeof(jdouble))); | |
8641 movflt(xmm6, Address(rsp,off++*sizeof(jdouble))); | |
8642 movflt(xmm7, Address(rsp,off++*sizeof(jdouble))); | |
8643 } else if (UseSSE >= 2) { | |
8644 movdbl(xmm0, Address(rsp,off++*sizeof(jdouble))); | |
8645 movdbl(xmm1, Address(rsp,off++*sizeof(jdouble))); | |
8646 movdbl(xmm2, Address(rsp,off++*sizeof(jdouble))); | |
8647 movdbl(xmm3, Address(rsp,off++*sizeof(jdouble))); | |
8648 movdbl(xmm4, Address(rsp,off++*sizeof(jdouble))); | |
8649 movdbl(xmm5, Address(rsp,off++*sizeof(jdouble))); | |
8650 movdbl(xmm6, Address(rsp,off++*sizeof(jdouble))); | |
8651 movdbl(xmm7, Address(rsp,off++*sizeof(jdouble))); | |
8652 #ifdef _LP64 | |
8653 movdbl(xmm8, Address(rsp,off++*sizeof(jdouble))); | |
8654 movdbl(xmm9, Address(rsp,off++*sizeof(jdouble))); | |
8655 movdbl(xmm10, Address(rsp,off++*sizeof(jdouble))); | |
8656 movdbl(xmm11, Address(rsp,off++*sizeof(jdouble))); | |
8657 movdbl(xmm12, Address(rsp,off++*sizeof(jdouble))); | |
8658 movdbl(xmm13, Address(rsp,off++*sizeof(jdouble))); | |
8659 movdbl(xmm14, Address(rsp,off++*sizeof(jdouble))); | |
8660 movdbl(xmm15, Address(rsp,off++*sizeof(jdouble))); | |
8661 #endif | |
8662 } | |
8663 if (UseSSE >= 1) { | |
8664 addptr(rsp, sizeof(jdouble)* LP64_ONLY(16) NOT_LP64(8)); | |
8665 } | |
8666 popa(); | |
8044 } | 8667 } |
8045 | 8668 |
8046 static const double pi_4 = 0.7853981633974483; | 8669 static const double pi_4 = 0.7853981633974483; |
8047 | 8670 |
8048 void MacroAssembler::trigfunc(char trig, int num_fpu_regs_in_use) { | 8671 void MacroAssembler::trigfunc(char trig, int num_fpu_regs_in_use) { |
8088 jmp(done); | 8711 jmp(done); |
8089 } | 8712 } |
8090 | 8713 |
8091 // slow case: runtime call | 8714 // slow case: runtime call |
8092 bind(slow_case); | 8715 bind(slow_case); |
8093 // Preserve registers across runtime call | 8716 |
8094 pusha(); | |
8095 int incoming_argument_and_return_value_offset = -1; | |
8096 if (num_fpu_regs_in_use > 1) { | |
8097 // Must preserve all other FPU regs (could alternatively convert | |
8098 // SharedRuntime::dsin and dcos into assembly routines known not to trash | |
8099 // FPU state, but can not trust C compiler) | |
8100 NEEDS_CLEANUP; | |
8101 // NOTE that in this case we also push the incoming argument to | |
8102 // the stack and restore it later; we also use this stack slot to | |
8103 // hold the return value from dsin or dcos. | |
8104 for (int i = 0; i < num_fpu_regs_in_use; i++) { | |
8105 subptr(rsp, sizeof(jdouble)); | |
8106 fstp_d(Address(rsp, 0)); | |
8107 } | |
8108 incoming_argument_and_return_value_offset = sizeof(jdouble)*(num_fpu_regs_in_use-1); | |
8109 fld_d(Address(rsp, incoming_argument_and_return_value_offset)); | |
8110 } | |
8111 subptr(rsp, sizeof(jdouble)); | |
8112 fstp_d(Address(rsp, 0)); | |
8113 #ifdef _LP64 | |
8114 movdbl(xmm0, Address(rsp, 0)); | |
8115 #endif // _LP64 | |
8116 | |
8117 // NOTE: we must not use call_VM_leaf here because that requires a | |
8118 // complete interpreter frame in debug mode -- same bug as 4387334 | |
8119 // MacroAssembler::call_VM_leaf_base is perfectly safe and will | |
8120 // do proper 64bit abi | |
8121 | |
8122 NEEDS_CLEANUP; | |
8123 // Need to add stack banging before this runtime call if it needs to | |
8124 // be taken; however, there is no generic stack banging routine at | |
8125 // the MacroAssembler level | |
8126 switch(trig) { | 8717 switch(trig) { |
8127 case 's': | 8718 case 's': |
8128 { | 8719 { |
8129 MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), 0); | 8720 fp_runtime_fallback(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), 1, num_fpu_regs_in_use); |
8130 } | 8721 } |
8131 break; | 8722 break; |
8132 case 'c': | 8723 case 'c': |
8133 { | 8724 { |
8134 MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), 0); | 8725 fp_runtime_fallback(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), 1, num_fpu_regs_in_use); |
8135 } | 8726 } |
8136 break; | 8727 break; |
8137 case 't': | 8728 case 't': |
8138 { | 8729 { |
8139 MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), 0); | 8730 fp_runtime_fallback(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), 1, num_fpu_regs_in_use); |
8140 } | 8731 } |
8141 break; | 8732 break; |
8142 default: | 8733 default: |
8143 assert(false, "bad intrinsic"); | 8734 assert(false, "bad intrinsic"); |
8144 break; | 8735 break; |
8145 } | 8736 } |
8146 #ifdef _LP64 | |
8147 movsd(Address(rsp, 0), xmm0); | |
8148 fld_d(Address(rsp, 0)); | |
8149 #endif // _LP64 | |
8150 addptr(rsp, sizeof(jdouble)); | |
8151 if (num_fpu_regs_in_use > 1) { | |
8152 // Must save return value to stack and then restore entire FPU stack | |
8153 fstp_d(Address(rsp, incoming_argument_and_return_value_offset)); | |
8154 for (int i = 0; i < num_fpu_regs_in_use; i++) { | |
8155 fld_d(Address(rsp, 0)); | |
8156 addptr(rsp, sizeof(jdouble)); | |
8157 } | |
8158 } | |
8159 popa(); | |
8160 | 8737 |
8161 // Come here with result in F-TOS | 8738 // Come here with result in F-TOS |
8162 bind(done); | 8739 bind(done); |
8163 | 8740 |
8164 if (tmp != noreg) { | 8741 if (tmp != noreg) { |
8237 bind(found_method); | 8814 bind(found_method); |
8238 | 8815 |
8239 // Got a hit. | 8816 // Got a hit. |
8240 movl(scan_temp, Address(scan_temp, itableOffsetEntry::offset_offset_in_bytes())); | 8817 movl(scan_temp, Address(scan_temp, itableOffsetEntry::offset_offset_in_bytes())); |
8241 movptr(method_result, Address(recv_klass, scan_temp, Address::times_1)); | 8818 movptr(method_result, Address(recv_klass, scan_temp, Address::times_1)); |
8819 } | |
8820 | |
8821 | |
8822 // virtual method calling | |
8823 void MacroAssembler::lookup_virtual_method(Register recv_klass, | |
8824 RegisterOrConstant vtable_index, | |
8825 Register method_result) { | |
8826 const int base = instanceKlass::vtable_start_offset() * wordSize; | |
8827 assert(vtableEntry::size() * wordSize == wordSize, "else adjust the scaling in the code below"); | |
8828 Address vtable_entry_addr(recv_klass, | |
8829 vtable_index, Address::times_ptr, | |
8830 base + vtableEntry::method_offset_in_bytes()); | |
8831 movptr(method_result, vtable_entry_addr); | |
8242 } | 8832 } |
8243 | 8833 |
8244 | 8834 |
8245 void MacroAssembler::check_klass_subtype(Register sub_klass, | 8835 void MacroAssembler::check_klass_subtype(Register sub_klass, |
8246 Register super_klass, | 8836 Register super_klass, |
8489 if (!VerifyOops) return; | 9079 if (!VerifyOops) return; |
8490 | 9080 |
8491 // Pass register number to verify_oop_subroutine | 9081 // Pass register number to verify_oop_subroutine |
8492 char* b = new char[strlen(s) + 50]; | 9082 char* b = new char[strlen(s) + 50]; |
8493 sprintf(b, "verify_oop: %s: %s", reg->name(), s); | 9083 sprintf(b, "verify_oop: %s: %s", reg->name(), s); |
9084 BLOCK_COMMENT("verify_oop {"); | |
8494 #ifdef _LP64 | 9085 #ifdef _LP64 |
8495 push(rscratch1); // save r10, trashed by movptr() | 9086 push(rscratch1); // save r10, trashed by movptr() |
8496 #endif | 9087 #endif |
8497 push(rax); // save rax, | 9088 push(rax); // save rax, |
8498 push(reg); // pass register argument | 9089 push(reg); // pass register argument |
8503 push(rax); | 9094 push(rax); |
8504 // call indirectly to solve generation ordering problem | 9095 // call indirectly to solve generation ordering problem |
8505 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address())); | 9096 movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address())); |
8506 call(rax); | 9097 call(rax); |
8507 // Caller pops the arguments (oop, message) and restores rax, r10 | 9098 // Caller pops the arguments (oop, message) and restores rax, r10 |
9099 BLOCK_COMMENT("} verify_oop"); | |
8508 } | 9100 } |
8509 | 9101 |
8510 | 9102 |
8511 RegisterOrConstant MacroAssembler::delayed_value_impl(intptr_t* delayed_value_addr, | 9103 RegisterOrConstant MacroAssembler::delayed_value_impl(intptr_t* delayed_value_addr, |
8512 Register tmp, | 9104 Register tmp, |
8523 testptr(tmp, tmp); | 9115 testptr(tmp, tmp); |
8524 if (WizardMode) { | 9116 if (WizardMode) { |
8525 jcc(Assembler::notZero, L); | 9117 jcc(Assembler::notZero, L); |
8526 char* buf = new char[40]; | 9118 char* buf = new char[40]; |
8527 sprintf(buf, "DelayedValue="INTPTR_FORMAT, delayed_value_addr[1]); | 9119 sprintf(buf, "DelayedValue="INTPTR_FORMAT, delayed_value_addr[1]); |
8528 stop(buf); | 9120 STOP(buf); |
8529 } else { | 9121 } else { |
8530 jccb(Assembler::notZero, L); | 9122 jccb(Assembler::notZero, L); |
8531 hlt(); | 9123 hlt(); |
8532 } | 9124 } |
8533 bind(L); | 9125 bind(L); |
8536 | 9128 |
8537 if (offset != 0) | 9129 if (offset != 0) |
8538 addptr(tmp, offset); | 9130 addptr(tmp, offset); |
8539 | 9131 |
8540 return RegisterOrConstant(tmp); | 9132 return RegisterOrConstant(tmp); |
8541 } | |
8542 | |
8543 | |
8544 // registers on entry: | |
8545 // - rax ('check' register): required MethodType | |
8546 // - rcx: method handle | |
8547 // - rdx, rsi, or ?: killable temp | |
8548 void MacroAssembler::check_method_handle_type(Register mtype_reg, Register mh_reg, | |
8549 Register temp_reg, | |
8550 Label& wrong_method_type) { | |
8551 Address type_addr(mh_reg, delayed_value(java_lang_invoke_MethodHandle::type_offset_in_bytes, temp_reg)); | |
8552 // compare method type against that of the receiver | |
8553 if (UseCompressedOops) { | |
8554 load_heap_oop(temp_reg, type_addr); | |
8555 cmpptr(mtype_reg, temp_reg); | |
8556 } else { | |
8557 cmpptr(mtype_reg, type_addr); | |
8558 } | |
8559 jcc(Assembler::notEqual, wrong_method_type); | |
8560 } | |
8561 | |
8562 | |
8563 // A method handle has a "vmslots" field which gives the size of its | |
8564 // argument list in JVM stack slots. This field is either located directly | |
8565 // in every method handle, or else is indirectly accessed through the | |
8566 // method handle's MethodType. This macro hides the distinction. | |
8567 void MacroAssembler::load_method_handle_vmslots(Register vmslots_reg, Register mh_reg, | |
8568 Register temp_reg) { | |
8569 assert_different_registers(vmslots_reg, mh_reg, temp_reg); | |
8570 // load mh.type.form.vmslots | |
8571 Register temp2_reg = vmslots_reg; | |
8572 load_heap_oop(temp2_reg, Address(mh_reg, delayed_value(java_lang_invoke_MethodHandle::type_offset_in_bytes, temp_reg))); | |
8573 load_heap_oop(temp2_reg, Address(temp2_reg, delayed_value(java_lang_invoke_MethodType::form_offset_in_bytes, temp_reg))); | |
8574 movl(vmslots_reg, Address(temp2_reg, delayed_value(java_lang_invoke_MethodTypeForm::vmslots_offset_in_bytes, temp_reg))); | |
8575 } | |
8576 | |
8577 | |
8578 // registers on entry: | |
8579 // - rcx: method handle | |
8580 // - rdx: killable temp (interpreted only) | |
8581 // - rax: killable temp (compiled only) | |
8582 void MacroAssembler::jump_to_method_handle_entry(Register mh_reg, Register temp_reg) { | |
8583 assert(mh_reg == rcx, "caller must put MH object in rcx"); | |
8584 assert_different_registers(mh_reg, temp_reg); | |
8585 | |
8586 // pick out the interpreted side of the handler | |
8587 // NOTE: vmentry is not an oop! | |
8588 movptr(temp_reg, Address(mh_reg, delayed_value(java_lang_invoke_MethodHandle::vmentry_offset_in_bytes, temp_reg))); | |
8589 | |
8590 // off we go... | |
8591 jmp(Address(temp_reg, MethodHandleEntry::from_interpreted_entry_offset_in_bytes())); | |
8592 | |
8593 // for the various stubs which take control at this point, | |
8594 // see MethodHandles::generate_method_handle_stub | |
8595 } | 9133 } |
8596 | 9134 |
8597 | 9135 |
8598 Address MacroAssembler::argument_address(RegisterOrConstant arg_slot, | 9136 Address MacroAssembler::argument_address(RegisterOrConstant arg_slot, |
8599 int extra_slot_offset) { | 9137 int extra_slot_offset) { |
8665 NOT_LP64(get_thread(thread_reg)); | 9203 NOT_LP64(get_thread(thread_reg)); |
8666 | 9204 |
8667 movptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_top_offset()))); | 9205 movptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_top_offset()))); |
8668 cmpptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_start_offset()))); | 9206 cmpptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_start_offset()))); |
8669 jcc(Assembler::aboveEqual, next); | 9207 jcc(Assembler::aboveEqual, next); |
8670 stop("assert(top >= start)"); | 9208 STOP("assert(top >= start)"); |
8671 should_not_reach_here(); | 9209 should_not_reach_here(); |
8672 | 9210 |
8673 bind(next); | 9211 bind(next); |
8674 movptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_end_offset()))); | 9212 movptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_end_offset()))); |
8675 cmpptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_top_offset()))); | 9213 cmpptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_top_offset()))); |
8676 jcc(Assembler::aboveEqual, ok); | 9214 jcc(Assembler::aboveEqual, ok); |
8677 stop("assert(top <= end)"); | 9215 STOP("assert(top <= end)"); |
8678 should_not_reach_here(); | 9216 should_not_reach_here(); |
8679 | 9217 |
8680 bind(ok); | 9218 bind(ok); |
8681 NOT_LP64(pop(thread_reg)); | 9219 NOT_LP64(pop(thread_reg)); |
8682 pop(t1); | 9220 pop(t1); |
9105 } else | 9643 } else |
9106 #endif | 9644 #endif |
9107 movptr(dst, src); | 9645 movptr(dst, src); |
9108 } | 9646 } |
9109 | 9647 |
9648 void MacroAssembler::cmp_heap_oop(Register src1, Address src2, Register tmp) { | |
9649 assert_different_registers(src1, tmp); | |
9650 #ifdef _LP64 | |
9651 if (UseCompressedOops) { | |
9652 bool did_push = false; | |
9653 if (tmp == noreg) { | |
9654 tmp = rax; | |
9655 push(tmp); | |
9656 did_push = true; | |
9657 assert(!src2.uses(rsp), "can't push"); | |
9658 } | |
9659 load_heap_oop(tmp, src2); | |
9660 cmpptr(src1, tmp); | |
9661 if (did_push) pop(tmp); | |
9662 } else | |
9663 #endif | |
9664 cmpptr(src1, src2); | |
9665 } | |
9666 | |
9110 // Used for storing NULLs. | 9667 // Used for storing NULLs. |
9111 void MacroAssembler::store_heap_oop_null(Address dst) { | 9668 void MacroAssembler::store_heap_oop_null(Address dst) { |
9112 #ifdef _LP64 | 9669 #ifdef _LP64 |
9113 if (UseCompressedOops) { | 9670 if (UseCompressedOops) { |
9114 movl(dst, (int32_t)NULL_WORD); | 9671 movl(dst, (int32_t)NULL_WORD); |
9135 if (CheckCompressedOops) { | 9692 if (CheckCompressedOops) { |
9136 Label ok; | 9693 Label ok; |
9137 push(rscratch1); // cmpptr trashes rscratch1 | 9694 push(rscratch1); // cmpptr trashes rscratch1 |
9138 cmpptr(r12_heapbase, ExternalAddress((address)Universe::narrow_oop_base_addr())); | 9695 cmpptr(r12_heapbase, ExternalAddress((address)Universe::narrow_oop_base_addr())); |
9139 jcc(Assembler::equal, ok); | 9696 jcc(Assembler::equal, ok); |
9140 stop(msg); | 9697 STOP(msg); |
9141 bind(ok); | 9698 bind(ok); |
9142 pop(rscratch1); | 9699 pop(rscratch1); |
9143 } | 9700 } |
9144 } | 9701 } |
9145 #endif | 9702 #endif |
9168 verify_heapbase("MacroAssembler::encode_heap_oop_not_null: heap base corrupted?"); | 9725 verify_heapbase("MacroAssembler::encode_heap_oop_not_null: heap base corrupted?"); |
9169 if (CheckCompressedOops) { | 9726 if (CheckCompressedOops) { |
9170 Label ok; | 9727 Label ok; |
9171 testq(r, r); | 9728 testq(r, r); |
9172 jcc(Assembler::notEqual, ok); | 9729 jcc(Assembler::notEqual, ok); |
9173 stop("null oop passed to encode_heap_oop_not_null"); | 9730 STOP("null oop passed to encode_heap_oop_not_null"); |
9174 bind(ok); | 9731 bind(ok); |
9175 } | 9732 } |
9176 #endif | 9733 #endif |
9177 verify_oop(r, "broken oop in encode_heap_oop_not_null"); | 9734 verify_oop(r, "broken oop in encode_heap_oop_not_null"); |
9178 if (Universe::narrow_oop_base() != NULL) { | 9735 if (Universe::narrow_oop_base() != NULL) { |
9189 verify_heapbase("MacroAssembler::encode_heap_oop_not_null2: heap base corrupted?"); | 9746 verify_heapbase("MacroAssembler::encode_heap_oop_not_null2: heap base corrupted?"); |
9190 if (CheckCompressedOops) { | 9747 if (CheckCompressedOops) { |
9191 Label ok; | 9748 Label ok; |
9192 testq(src, src); | 9749 testq(src, src); |
9193 jcc(Assembler::notEqual, ok); | 9750 jcc(Assembler::notEqual, ok); |
9194 stop("null oop passed to encode_heap_oop_not_null2"); | 9751 STOP("null oop passed to encode_heap_oop_not_null2"); |
9195 bind(ok); | 9752 bind(ok); |
9196 } | 9753 } |
9197 #endif | 9754 #endif |
9198 verify_oop(src, "broken oop in encode_heap_oop_not_null2"); | 9755 verify_oop(src, "broken oop in encode_heap_oop_not_null2"); |
9199 if (dst != src) { | 9756 if (dst != src) { |
9380 mov(rax, rsp); | 9937 mov(rax, rsp); |
9381 andptr(rax, StackAlignmentInBytes-1); | 9938 andptr(rax, StackAlignmentInBytes-1); |
9382 cmpptr(rax, StackAlignmentInBytes-wordSize); | 9939 cmpptr(rax, StackAlignmentInBytes-wordSize); |
9383 pop(rax); | 9940 pop(rax); |
9384 jcc(Assembler::equal, L); | 9941 jcc(Assembler::equal, L); |
9385 stop("Stack is not properly aligned!"); | 9942 STOP("Stack is not properly aligned!"); |
9386 bind(L); | 9943 bind(L); |
9387 } | 9944 } |
9388 #endif | 9945 #endif |
9389 | 9946 |
9390 } | 9947 } |
10054 | 10611 |
10055 // That's it | 10612 // That's it |
10056 bind(DONE); | 10613 bind(DONE); |
10057 } | 10614 } |
10058 | 10615 |
10059 #ifdef PRODUCT | |
10060 #define BLOCK_COMMENT(str) /* nothing */ | |
10061 #else | |
10062 #define BLOCK_COMMENT(str) block_comment(str) | |
10063 #endif | |
10064 | |
10065 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":") | |
10066 void MacroAssembler::generate_fill(BasicType t, bool aligned, | 10616 void MacroAssembler::generate_fill(BasicType t, bool aligned, |
10067 Register to, Register value, Register count, | 10617 Register to, Register value, Register count, |
10068 Register rtmp, XMMRegister xtmp) { | 10618 Register rtmp, XMMRegister xtmp) { |
10069 ShortBranchVerifier sbv(this); | 10619 ShortBranchVerifier sbv(this); |
10070 assert_different_registers(to, value, count, rtmp); | 10620 assert_different_registers(to, value, count, rtmp); |