Mercurial > hg > truffle

comparison src/cpu/x86/vm/vm_version_x86.hpp @ 7482:989155e2d07a

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Merge with hs25-b15.
author Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
date Wed, 16 Jan 2013 01:34:24 +0100
parents e522a00b91aa 00af3a3a8df4
children 6b0fd0964b87
comparison
equal deleted inserted replaced
7381:6761a8f854a4 7482:989155e2d07a
202 bmi1 : 1, 202 bmi1 : 1,
203 : 1, 203 : 1,
204 avx2 : 1, 204 avx2 : 1,
205 : 2, 205 : 2,
206 bmi2 : 1, 206 bmi2 : 1,
207 : 23; 207 erms : 1,
208 : 22;
208 } bits; 209 } bits;
209 }; 210 };
210 211
211 union XemXcr0Eax { 212 union XemXcr0Eax {
212 uint32_t value; 213 uint32_t value;
245 CPU_LZCNT = (1 << 14), 246 CPU_LZCNT = (1 << 14),
246 CPU_TSC = (1 << 15), 247 CPU_TSC = (1 << 15),
247 CPU_TSCINV = (1 << 16), 248 CPU_TSCINV = (1 << 16),
248 CPU_AVX = (1 << 17), 249 CPU_AVX = (1 << 17),
249 CPU_AVX2 = (1 << 18), 250 CPU_AVX2 = (1 << 18),
250 CPU_AES = (1 << 19) 251 CPU_AES = (1 << 19),
252 CPU_ERMS = (1 << 20) // enhanced 'rep movsb/stosb' instructions
251 } cpuFeatureFlags; 253 } cpuFeatureFlags;
252 254
253 enum { 255 enum {
254 // AMD 256 // AMD
255 CPU_FAMILY_AMD_11H = 0x11, 257 CPU_FAMILY_AMD_11H = 0x11,
423 result |= CPU_TSC; 425 result |= CPU_TSC;
424 if (_cpuid_info.ext_cpuid7_edx.bits.tsc_invariance != 0) 426 if (_cpuid_info.ext_cpuid7_edx.bits.tsc_invariance != 0)
425 result |= CPU_TSCINV; 427 result |= CPU_TSCINV;
426 if (_cpuid_info.std_cpuid1_ecx.bits.aes != 0) 428 if (_cpuid_info.std_cpuid1_ecx.bits.aes != 0)
427 result |= CPU_AES; 429 result |= CPU_AES;
430 if (_cpuid_info.sef_cpuid7_ebx.bits.erms != 0)
431 result |= CPU_ERMS;
428 432
429 // AMD features. 433 // AMD features.
430 if (is_amd()) { 434 if (is_amd()) {
431 if ((_cpuid_info.ext_cpuid1_edx.bits.tdnow != 0) || 435 if ((_cpuid_info.ext_cpuid1_edx.bits.tdnow != 0) ||
432 (_cpuid_info.ext_cpuid1_ecx.bits.prefetchw != 0)) 436 (_cpuid_info.ext_cpuid1_ecx.bits.prefetchw != 0))
487 491
488 static bool supports_processor_topology() { 492 static bool supports_processor_topology() {
489 return (_cpuid_info.std_max_function >= 0xB) && 493 return (_cpuid_info.std_max_function >= 0xB) &&
490 // eax[4:0] | ebx[0:15] == 0 indicates invalid topology level. 494 // eax[4:0] | ebx[0:15] == 0 indicates invalid topology level.
491 // Some cpus have max cpuid >= 0xB but do not support processor topology. 495 // Some cpus have max cpuid >= 0xB but do not support processor topology.
492 ((_cpuid_info.tpl_cpuidB0_eax & 0x1f | _cpuid_info.tpl_cpuidB0_ebx.bits.logical_cpus) != 0); 496 (((_cpuid_info.tpl_cpuidB0_eax & 0x1f) | _cpuid_info.tpl_cpuidB0_ebx.bits.logical_cpus) != 0);
493 } 497 }
494 498
495 static uint cores_per_cpu() { 499 static uint cores_per_cpu() {
496 uint result = 1; 500 uint result = 1;
497 if (is_intel()) { 501 if (is_intel()) {
548 static bool supports_popcnt() { return (_cpuFeatures & CPU_POPCNT) != 0; } 552 static bool supports_popcnt() { return (_cpuFeatures & CPU_POPCNT) != 0; }
549 static bool supports_avx() { return (_cpuFeatures & CPU_AVX) != 0; } 553 static bool supports_avx() { return (_cpuFeatures & CPU_AVX) != 0; }
550 static bool supports_avx2() { return (_cpuFeatures & CPU_AVX2) != 0; } 554 static bool supports_avx2() { return (_cpuFeatures & CPU_AVX2) != 0; }
551 static bool supports_tsc() { return (_cpuFeatures & CPU_TSC) != 0; } 555 static bool supports_tsc() { return (_cpuFeatures & CPU_TSC) != 0; }
552 static bool supports_aes() { return (_cpuFeatures & CPU_AES) != 0; } 556 static bool supports_aes() { return (_cpuFeatures & CPU_AES) != 0; }
557 static bool supports_erms() { return (_cpuFeatures & CPU_ERMS) != 0; }
553 558
554 // Intel features 559 // Intel features
555 static bool is_intel_family_core() { return is_intel() && 560 static bool is_intel_family_core() { return is_intel() &&
556 extended_cpu_family() == CPU_FAMILY_INTEL_CORE; } 561 extended_cpu_family() == CPU_FAMILY_INTEL_CORE; }
557 562