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comparison src/cpu/x86/vm/x86_32.ad @ 7482:989155e2d07a

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Merge with hs25-b15.
author Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
date Wed, 16 Jan 2013 01:34:24 +0100
parents 00af3a3a8df4
children b30b3c2a0cf2
comparison
equal deleted inserted replaced
7381:6761a8f854a4 7482:989155e2d07a
11570 11570
11571 11571
11572 // ======================================================================= 11572 // =======================================================================
11573 // fast clearing of an array 11573 // fast clearing of an array
11574 instruct rep_stos(eCXRegI cnt, eDIRegP base, eAXRegI zero, Universe dummy, eFlagsReg cr) %{ 11574 instruct rep_stos(eCXRegI cnt, eDIRegP base, eAXRegI zero, Universe dummy, eFlagsReg cr) %{
11575 predicate(!UseFastStosb);
11575 match(Set dummy (ClearArray cnt base)); 11576 match(Set dummy (ClearArray cnt base));
11576 effect(USE_KILL cnt, USE_KILL base, KILL zero, KILL cr); 11577 effect(USE_KILL cnt, USE_KILL base, KILL zero, KILL cr);
11577 format %{ "SHL ECX,1\t# Convert doublewords to words\n\t" 11578 format %{ "XOR EAX,EAX\t# ClearArray:\n\t"
11578 "XOR EAX,EAX\n\t" 11579 "SHL ECX,1\t# Convert doublewords to words\n\t"
11579 "REP STOS\t# store EAX into [EDI++] while ECX--" %} 11580 "REP STOS\t# store EAX into [EDI++] while ECX--" %}
11580 opcode(0,0x4); 11581 ins_encode %{
11581 ins_encode( Opcode(0xD1), RegOpc(ECX), 11582 __ clear_mem($base$$Register, $cnt$$Register, $zero$$Register);
11582 OpcRegReg(0x33,EAX,EAX), 11583 %}
11583 Opcode(0xF3), Opcode(0xAB) ); 11584 ins_pipe( pipe_slow );
11585 %}
11586
11587 instruct rep_fast_stosb(eCXRegI cnt, eDIRegP base, eAXRegI zero, Universe dummy, eFlagsReg cr) %{
11588 predicate(UseFastStosb);
11589 match(Set dummy (ClearArray cnt base));
11590 effect(USE_KILL cnt, USE_KILL base, KILL zero, KILL cr);
11591 format %{ "XOR EAX,EAX\t# ClearArray:\n\t"
11592 "SHL ECX,3\t# Convert doublewords to bytes\n\t"
11593 "REP STOSB\t# store EAX into [EDI++] while ECX--" %}
11594 ins_encode %{
11595 __ clear_mem($base$$Register, $cnt$$Register, $zero$$Register);
11596 %}
11584 ins_pipe( pipe_slow ); 11597 ins_pipe( pipe_slow );
11585 %} 11598 %}
11586 11599
11587 instruct string_compare(eDIRegP str1, eCXRegI cnt1, eSIRegP str2, eDXRegI cnt2, 11600 instruct string_compare(eDIRegP str1, eCXRegI cnt1, eSIRegP str2, eDXRegI cnt2,
11588 eAXRegI result, regD tmp1, eFlagsReg cr) %{ 11601 eAXRegI result, regD tmp1, eFlagsReg cr) %{