Mercurial > hg > truffle
comparison src/cpu/x86/vm/x86_64.ad @ 605:98cb887364d3
6810672: Comment typos
Summary: I have collected some typos I have found while looking at the code.
Reviewed-by: kvn, never
| author | twisti |
|---|---|
| date | Fri, 27 Feb 2009 13:27:09 -0800 |
| parents | 2cacccded90f |
| children | 56aae7be60d4 |
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| 604:ec59443af135 | 605:98cb887364d3 |
|---|---|
| 5481 %} | 5481 %} |
| 5482 | 5482 |
| 5483 | 5483 |
| 5484 //----------OPERAND CLASSES---------------------------------------------------- | 5484 //----------OPERAND CLASSES---------------------------------------------------- |
| 5485 // Operand Classes are groups of operands that are used as to simplify | 5485 // Operand Classes are groups of operands that are used as to simplify |
| 5486 // instruction definitions by not requiring the AD writer to specify seperate | 5486 // instruction definitions by not requiring the AD writer to specify separate |
| 5487 // instructions for every form of operand when the instruction accepts | 5487 // instructions for every form of operand when the instruction accepts |
| 5488 // multiple operand types with the same basic encoding and format. The classic | 5488 // multiple operand types with the same basic encoding and format. The classic |
| 5489 // case of this is memory operands. | 5489 // case of this is memory operands. |
| 5490 | 5490 |
| 5491 opclass memory(indirect, indOffset8, indOffset32, indIndexOffset, indIndex, | 5491 opclass memory(indirect, indOffset8, indOffset32, indIndexOffset, indIndex, |
| 8361 %} | 8361 %} |
| 8362 | 8362 |
| 8363 //----------- DivL-By-Constant-Expansions-------------------------------------- | 8363 //----------- DivL-By-Constant-Expansions-------------------------------------- |
| 8364 // DivI cases are handled by the compiler | 8364 // DivI cases are handled by the compiler |
| 8365 | 8365 |
| 8366 // Magic constant, reciprical of 10 | 8366 // Magic constant, reciprocal of 10 |
| 8367 instruct loadConL_0x6666666666666667(rRegL dst) | 8367 instruct loadConL_0x6666666666666667(rRegL dst) |
| 8368 %{ | 8368 %{ |
| 8369 effect(DEF dst); | 8369 effect(DEF dst); |
| 8370 | 8370 |
| 8371 format %{ "movq $dst, #0x666666666666667\t# Used in div-by-10" %} | 8371 format %{ "movq $dst, #0x666666666666667\t# Used in div-by-10" %} |
| 12080 | 12080 |
| 12081 //----------PEEPHOLE RULES----------------------------------------------------- | 12081 //----------PEEPHOLE RULES----------------------------------------------------- |
| 12082 // These must follow all instruction definitions as they use the names | 12082 // These must follow all instruction definitions as they use the names |
| 12083 // defined in the instructions definitions. | 12083 // defined in the instructions definitions. |
| 12084 // | 12084 // |
| 12085 // peepmatch ( root_instr_name [precerding_instruction]* ); | 12085 // peepmatch ( root_instr_name [preceding_instruction]* ); |
| 12086 // | 12086 // |
| 12087 // peepconstraint %{ | 12087 // peepconstraint %{ |
| 12088 // (instruction_number.operand_name relational_op instruction_number.operand_name | 12088 // (instruction_number.operand_name relational_op instruction_number.operand_name |
| 12089 // [, ...] ); | 12089 // [, ...] ); |
| 12090 // // instruction numbers are zero-based using left to right order in peepmatch | 12090 // // instruction numbers are zero-based using left to right order in peepmatch |