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comparison src/cpu/sparc/vm/assembler_sparc.hpp @ 1926:a1e319b5b13a

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Merge
author trims
date Thu, 11 Nov 2010 23:29:32 -0800
parents fff777a71346
children f95d63e2154a
comparison
equal deleted inserted replaced
1895:d4681dc64964 1926:a1e319b5b13a
1124 1124
1125 inline void add(Register s1, Register s2, Register d ); 1125 inline void add(Register s1, Register s2, Register d );
1126 inline void add(Register s1, int simm13a, Register d, relocInfo::relocType rtype = relocInfo::none); 1126 inline void add(Register s1, int simm13a, Register d, relocInfo::relocType rtype = relocInfo::none);
1127 inline void add(Register s1, int simm13a, Register d, RelocationHolder const& rspec); 1127 inline void add(Register s1, int simm13a, Register d, RelocationHolder const& rspec);
1128 inline void add(Register s1, RegisterOrConstant s2, Register d, int offset = 0); 1128 inline void add(Register s1, RegisterOrConstant s2, Register d, int offset = 0);
1129 inline void add(const Address& a, Register d, int offset = 0) { add( a.base(), a.disp() + offset, d, a.rspec(offset)); } 1129 inline void add(const Address& a, Register d, int offset = 0);
1130 1130
1131 void addcc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(add_op3 | cc_bit_op3) | rs1(s1) | rs2(s2) ); } 1131 void addcc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(add_op3 | cc_bit_op3) | rs1(s1) | rs2(s2) ); }
1132 void addcc( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(add_op3 | cc_bit_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); } 1132 void addcc( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(add_op3 | cc_bit_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
1133 void addc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(addc_op3 ) | rs1(s1) | rs2(s2) ); } 1133 void addc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(addc_op3 ) | rs1(s1) | rs2(s2) ); }
1134 void addc( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(addc_op3 ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); } 1134 void addc( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(addc_op3 ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }