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comparison src/cpu/x86/vm/globals_x86.hpp @ 6633:a5dd6e3ef9f3

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6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp Reviewed-by: kvn, dholmes, coleenp Contributed-by: Tao Mao <tao.mao@oracle.com>
author twisti
date Mon, 27 Aug 2012 15:17:17 -0700
parents 15085a6eb50c
children 00af3a3a8df4
comparison
equal deleted inserted replaced
6632:a1c7f6472621 6633:a5dd6e3ef9f3
1 /* 1 /*
2 * Copyright (c) 2000, 2011, Oracle and/or its affiliates. All rights reserved. 2 * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 * 4 *
5 * This code is free software; you can redistribute it and/or modify it 5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as 6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation. 7 * published by the Free Software Foundation.
76 define_pd_global(bool, UseMembar, false); 76 define_pd_global(bool, UseMembar, false);
77 #endif 77 #endif
78 78
79 // GC Ergo Flags 79 // GC Ergo Flags
80 define_pd_global(intx, CMSYoungGenPerWorker, 64*M); // default max size of CMS young gen, per GC worker thread 80 define_pd_global(intx, CMSYoungGenPerWorker, 64*M); // default max size of CMS young gen, per GC worker thread
81
82 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct) \
83 \
84 develop(bool, IEEEPrecision, true, \
85 "Enables IEEE precision (for INTEL only)") \
86 \
87 product(intx, FenceInstruction, 0, \
88 "(Unsafe,Unstable) Experimental") \
89 \
90 product(intx, ReadPrefetchInstr, 0, \
91 "Prefetch instruction to prefetch ahead") \
92 \
93 product(bool, UseStoreImmI16, true, \
94 "Use store immediate 16-bits value instruction on x86") \
95 \
96 product(intx, UseAVX, 99, \
97 "Highest supported AVX instructions set on x86/x64") \
98 \
99 diagnostic(bool, UseIncDec, true, \
100 "Use INC, DEC instructions on x86") \
101 \
102 product(bool, UseNewLongLShift, false, \
103 "Use optimized bitwise shift left") \
104 \
105 product(bool, UseAddressNop, false, \
106 "Use '0F 1F [addr]' NOP instructions on x86 cpus") \
107 \
108 product(bool, UseXmmLoadAndClearUpper, true, \
109 "Load low part of XMM register and clear upper part") \
110 \
111 product(bool, UseXmmRegToRegMoveAll, false, \
112 "Copy all XMM register bits when moving value between registers") \
113 \
114 product(bool, UseXmmI2D, false, \
115 "Use SSE2 CVTDQ2PD instruction to convert Integer to Double") \
116 \
117 product(bool, UseXmmI2F, false, \
118 "Use SSE2 CVTDQ2PS instruction to convert Integer to Float") \
119 \
120 product(bool, UseUnalignedLoadStores, false, \
121 "Use SSE2 MOVDQU instruction for Arraycopy") \
122 \
123 /* assembler */ \
124 product(bool, Use486InstrsOnly, false, \
125 "Use 80486 Compliant instruction subset") \
126 \
127 product(bool, UseCountLeadingZerosInstruction, false, \
128 "Use count leading zeros instruction") \
129
81 #endif // CPU_X86_VM_GLOBALS_X86_HPP 130 #endif // CPU_X86_VM_GLOBALS_X86_HPP