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comparison src/os_cpu/solaris_x86/vm/orderAccess_solaris_x86.inline.hpp @ 1711:a6bff45449bc

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6973570: OrderAccess::storestore() scales poorly on multi-socket x64 and sparc: cache-line ping-ponging Summary: volatile store to static variable removed in favour of a volatile store to stack to avoid excessive cache coherency traffic; verified that the volatile store is not elided by any of our current compilers. Reviewed-by: dholmes, dice, jcoomes, kvn
author ysr
date Tue, 10 Aug 2010 14:53:35 -0700
parents c18cbe5936b8
children f95d63e2154a
comparison
equal deleted inserted replaced
1710:94251661de76 1711:a6bff45449bc
1 /* 1 /*
2 * Copyright (c) 2003, 2009, Oracle and/or its affiliates. All rights reserved. 2 * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 * 4 *
5 * This code is free software; you can redistribute it and/or modify it 5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as 6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation. 7 * published by the Free Software Foundation.
38 _OrderAccess_acquire(); 38 _OrderAccess_acquire();
39 39
40 } 40 }
41 41
42 inline void OrderAccess::release() { 42 inline void OrderAccess::release() {
43 dummy = 0; 43 // Avoid hitting the same cache-line from
44 // different threads.
45 volatile jint local_dummy = 0;
44 } 46 }
45 47
46 inline void OrderAccess::fence() { 48 inline void OrderAccess::fence() {
47 if (os::is_MP()) { 49 if (os::is_MP()) {
48 _OrderAccess_fence(); 50 _OrderAccess_fence();
51 53
52 #ifdef _GNU_SOURCE 54 #ifdef _GNU_SOURCE
53 55
54 extern "C" { 56 extern "C" {
55 inline void _OrderAccess_acquire() { 57 inline void _OrderAccess_acquire() {
56 volatile intptr_t dummy; 58 volatile intptr_t local_dummy;
57 #ifdef AMD64 59 #ifdef AMD64
58 __asm__ volatile ("movq 0(%%rsp), %0" : "=r" (dummy) : : "memory"); 60 __asm__ volatile ("movq 0(%%rsp), %0" : "=r" (local_dummy) : : "memory");
59 #else 61 #else
60 __asm__ volatile ("movl 0(%%esp),%0" : "=r" (dummy) : : "memory"); 62 __asm__ volatile ("movl 0(%%esp),%0" : "=r" (local_dummy) : : "memory");
61 #endif // AMD64 63 #endif // AMD64
62 } 64 }
63 inline void _OrderAccess_fence() { 65 inline void _OrderAccess_fence() {
64 // Always use locked addl since mfence is sometimes expensive 66 // Always use locked addl since mfence is sometimes expensive
65 __asm__ volatile ("lock; addl $0,0(%%esp)" : : : "cc", "memory"); 67 __asm__ volatile ("lock; addl $0,0(%%esp)" : : : "cc", "memory");