comparison src/cpu/sparc/vm/c1_CodeStubs_sparc.cpp @ 2002:ac637b7220d1

6985015: C1 needs to support compressed oops Summary: This change implements compressed oops for C1 for x64 and sparc. The changes are mostly on the codegen level, with a few exceptions when we do access things outside of the heap that are uncompressed from the IR. Compressed oops are now also enabled with tiered. Reviewed-by: twisti, kvn, never, phh
author iveresov
date Tue, 30 Nov 2010 23:23:40 -0800
parents f95d63e2154a
children e4fee0bdaa85
comparison
equal deleted inserted replaced
1972:f95d63e2154a 2002:ac637b7220d1
432 432
433 assert(pre_val()->is_register(), "Precondition."); 433 assert(pre_val()->is_register(), "Precondition.");
434 434
435 Register pre_val_reg = pre_val()->as_register(); 435 Register pre_val_reg = pre_val()->as_register();
436 436
437 ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false); 437 ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false /*wide*/, false /*unaligned*/);
438 if (__ is_in_wdisp16_range(_continuation)) { 438 if (__ is_in_wdisp16_range(_continuation)) {
439 __ br_on_reg_cond(Assembler::rc_z, /*annul*/false, Assembler::pt, 439 __ br_on_reg_cond(Assembler::rc_z, /*annul*/false, Assembler::pt,
440 pre_val_reg, _continuation); 440 pre_val_reg, _continuation);
441 } else { 441 } else {
442 __ cmp(pre_val_reg, G0); 442 __ cmp(pre_val_reg, G0);