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comparison src/share/vm/c1/c1_FrameMap.hpp @ 2002:ac637b7220d1

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6985015: C1 needs to support compressed oops Summary: This change implements compressed oops for C1 for x64 and sparc. The changes are mostly on the codegen level, with a few exceptions when we do access things outside of the heap that are uncompressed from the IR. Compressed oops are now also enabled with tiered. Reviewed-by: twisti, kvn, never, phh
author iveresov
date Tue, 30 Nov 2010 23:23:40 -0800
parents f95d63e2154a
children b92c45f2bc75
comparison
equal deleted inserted replaced
1972:f95d63e2154a 2002:ac637b7220d1
74 nof_fpu_regs = pd_nof_fpu_regs_frame_map, 74 nof_fpu_regs = pd_nof_fpu_regs_frame_map,
75 75
76 nof_cpu_regs_reg_alloc = pd_nof_cpu_regs_reg_alloc, 76 nof_cpu_regs_reg_alloc = pd_nof_cpu_regs_reg_alloc,
77 nof_fpu_regs_reg_alloc = pd_nof_fpu_regs_reg_alloc, 77 nof_fpu_regs_reg_alloc = pd_nof_fpu_regs_reg_alloc,
78 78
79 nof_caller_save_cpu_regs = pd_nof_caller_save_cpu_regs_frame_map, 79 max_nof_caller_save_cpu_regs = pd_nof_caller_save_cpu_regs_frame_map,
80 nof_caller_save_fpu_regs = pd_nof_caller_save_fpu_regs_frame_map, 80 nof_caller_save_fpu_regs = pd_nof_caller_save_fpu_regs_frame_map,
81 81
82 spill_slot_size_in_bytes = 4 82 spill_slot_size_in_bytes = 4
83 }; 83 };
84 84
85 #ifdef TARGET_ARCH_x86 85 #ifdef TARGET_ARCH_x86
95 private: 95 private:
96 static bool _init_done; 96 static bool _init_done;
97 static Register _cpu_rnr2reg [nof_cpu_regs]; 97 static Register _cpu_rnr2reg [nof_cpu_regs];
98 static int _cpu_reg2rnr [nof_cpu_regs]; 98 static int _cpu_reg2rnr [nof_cpu_regs];
99 99
100 static LIR_Opr _caller_save_cpu_regs [nof_caller_save_cpu_regs]; 100 static LIR_Opr _caller_save_cpu_regs [max_nof_caller_save_cpu_regs];
101 static LIR_Opr _caller_save_fpu_regs [nof_caller_save_fpu_regs]; 101 static LIR_Opr _caller_save_fpu_regs [nof_caller_save_fpu_regs];
102 102
103 int _framesize; 103 int _framesize;
104 int _argcount; 104 int _argcount;
105 int _num_monitors; 105 int _num_monitors;
241 return sp_offset2vmreg(sp_offset_for_monitor_object(monitor_index)); 241 return sp_offset2vmreg(sp_offset_for_monitor_object(monitor_index));
242 } 242 }
243 VMReg regname(LIR_Opr opr) const; 243 VMReg regname(LIR_Opr opr) const;
244 244
245 static LIR_Opr caller_save_cpu_reg_at(int i) { 245 static LIR_Opr caller_save_cpu_reg_at(int i) {
246 assert(i >= 0 && i < nof_caller_save_cpu_regs, "out of bounds"); 246 assert(i >= 0 && i < max_nof_caller_save_cpu_regs, "out of bounds");
247 return _caller_save_cpu_regs[i]; 247 return _caller_save_cpu_regs[i];
248 } 248 }
249 249
250 static LIR_Opr caller_save_fpu_reg_at(int i) { 250 static LIR_Opr caller_save_fpu_reg_at(int i) {
251 assert(i >= 0 && i < nof_caller_save_fpu_regs, "out of bounds"); 251 assert(i >= 0 && i < nof_caller_save_fpu_regs, "out of bounds");