Mercurial > hg > truffle
comparison src/cpu/x86/vm/assembler_x86.cpp @ 20311:b1bc1af04c6e
8052081: Optimize generated by C2 code for Intel's Atom processor
Summary: Allow to execute vectorization and crc32 optimization on Atom. Enable UseFPUForSpilling by default on x86.
Reviewed-by: roland
author | kvn |
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date | Tue, 05 Aug 2014 15:02:10 -0700 |
parents | 78bbf4d43a14 |
children | 166d744df0de |
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20310:bfba6779654b | 20311:b1bc1af04c6e |
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3852 emit_int8(0x58); | 3852 emit_int8(0x58); |
3853 emit_int8((unsigned char)(0xC0 | encode)); | 3853 emit_int8((unsigned char)(0xC0 | encode)); |
3854 } | 3854 } |
3855 | 3855 |
3856 // Carry-Less Multiplication Quadword | 3856 // Carry-Less Multiplication Quadword |
3857 void Assembler::pclmulqdq(XMMRegister dst, XMMRegister src, int mask) { | |
3858 assert(VM_Version::supports_clmul(), ""); | |
3859 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_3A); | |
3860 emit_int8(0x44); | |
3861 emit_int8((unsigned char)(0xC0 | encode)); | |
3862 emit_int8((unsigned char)mask); | |
3863 } | |
3864 | |
3865 // Carry-Less Multiplication Quadword | |
3857 void Assembler::vpclmulqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int mask) { | 3866 void Assembler::vpclmulqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int mask) { |
3858 assert(VM_Version::supports_avx() && VM_Version::supports_clmul(), ""); | 3867 assert(VM_Version::supports_avx() && VM_Version::supports_clmul(), ""); |
3859 bool vector256 = false; | 3868 bool vector256 = false; |
3860 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A); | 3869 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A); |
3861 emit_int8(0x44); | 3870 emit_int8(0x44); |