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comparison src/cpu/x86/vm/assembler_x86.hpp @ 11080:b800986664f4

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7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32 Summary: add intrinsics using new instruction to interpreter, C1, C2, for suitable x86; add test Reviewed-by: kvn, twisti
author drchase
date Tue, 02 Jul 2013 20:42:12 -0400
parents cf8470eaf7e5
children 59e8ad757e19
comparison
equal deleted inserted replaced
11079:738e04fb1232 11080:b800986664f4
1264 void movdq(XMMRegister dst, Register src); 1264 void movdq(XMMRegister dst, Register src);
1265 void movdq(Register dst, XMMRegister src); 1265 void movdq(Register dst, XMMRegister src);
1266 1266
1267 // Move Aligned Double Quadword 1267 // Move Aligned Double Quadword
1268 void movdqa(XMMRegister dst, XMMRegister src); 1268 void movdqa(XMMRegister dst, XMMRegister src);
1269 void movdqa(XMMRegister dst, Address src);
1269 1270
1270 // Move Unaligned Double Quadword 1271 // Move Unaligned Double Quadword
1271 void movdqu(Address dst, XMMRegister src); 1272 void movdqu(Address dst, XMMRegister src);
1272 void movdqu(XMMRegister dst, Address src); 1273 void movdqu(XMMRegister dst, Address src);
1273 void movdqu(XMMRegister dst, XMMRegister src); 1274 void movdqu(XMMRegister dst, XMMRegister src);
1401 void vpermq(XMMRegister dst, XMMRegister src, int imm8, bool vector256); 1402 void vpermq(XMMRegister dst, XMMRegister src, int imm8, bool vector256);
1402 1403
1403 // SSE4.2 string instructions 1404 // SSE4.2 string instructions
1404 void pcmpestri(XMMRegister xmm1, XMMRegister xmm2, int imm8); 1405 void pcmpestri(XMMRegister xmm1, XMMRegister xmm2, int imm8);
1405 void pcmpestri(XMMRegister xmm1, Address src, int imm8); 1406 void pcmpestri(XMMRegister xmm1, Address src, int imm8);
1407
1408 // SSE 4.1 extract
1409 void pextrd(Register dst, XMMRegister src, int imm8);
1410 void pextrq(Register dst, XMMRegister src, int imm8);
1411
1412 // SSE 4.1 insert
1413 void pinsrd(XMMRegister dst, Register src, int imm8);
1414 void pinsrq(XMMRegister dst, Register src, int imm8);
1406 1415
1407 // SSE4.1 packed move 1416 // SSE4.1 packed move
1408 void pmovzxbw(XMMRegister dst, XMMRegister src); 1417 void pmovzxbw(XMMRegister dst, XMMRegister src);
1409 void pmovzxbw(XMMRegister dst, Address src); 1418 void pmovzxbw(XMMRegister dst, Address src);
1410 1419
1762 void vextracti128h(Address dst, XMMRegister src); 1771 void vextracti128h(Address dst, XMMRegister src);
1763 1772
1764 // duplicate 4-bytes integer data from src into 8 locations in dest 1773 // duplicate 4-bytes integer data from src into 8 locations in dest
1765 void vpbroadcastd(XMMRegister dst, XMMRegister src); 1774 void vpbroadcastd(XMMRegister dst, XMMRegister src);
1766 1775
1776 // Carry-Less Multiplication Quadword
1777 void vpclmulqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int mask);
1778
1767 // AVX instruction which is used to clear upper 128 bits of YMM registers and 1779 // AVX instruction which is used to clear upper 128 bits of YMM registers and
1768 // to avoid transaction penalty between AVX and SSE states. There is no 1780 // to avoid transaction penalty between AVX and SSE states. There is no
1769 // penalty if legacy SSE instructions are encoded using VEX prefix because 1781 // penalty if legacy SSE instructions are encoded using VEX prefix because
1770 // they always clear upper 128 bits. It should be used before calling 1782 // they always clear upper 128 bits. It should be used before calling
1771 // runtime code and native libraries. 1783 // runtime code and native libraries.