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comparison src/cpu/x86/vm/vm_version_x86.cpp @ 11080:b800986664f4

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7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32 Summary: add intrinsics using new instruction to interpreter, C1, C2, for suitable x86; add test Reviewed-by: kvn, twisti
author drchase
date Tue, 02 Jul 2013 20:42:12 -0400
parents 522c328b8b77
children 6b0fd0964b87 9e9af3aa4278
comparison
equal deleted inserted replaced
11079:738e04fb1232 11080:b800986664f4
1 /* 1 /*
2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. 2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 * 4 *
5 * This code is free software; you can redistribute it and/or modify it 5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as 6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation. 7 * published by the Free Software Foundation.
444 (supports_sse4_2() ? ", sse4.2" : ""), 444 (supports_sse4_2() ? ", sse4.2" : ""),
445 (supports_popcnt() ? ", popcnt" : ""), 445 (supports_popcnt() ? ", popcnt" : ""),
446 (supports_avx() ? ", avx" : ""), 446 (supports_avx() ? ", avx" : ""),
447 (supports_avx2() ? ", avx2" : ""), 447 (supports_avx2() ? ", avx2" : ""),
448 (supports_aes() ? ", aes" : ""), 448 (supports_aes() ? ", aes" : ""),
449 (supports_clmul() ? ", clmul" : ""),
449 (supports_erms() ? ", erms" : ""), 450 (supports_erms() ? ", erms" : ""),
450 (supports_mmx_ext() ? ", mmxext" : ""), 451 (supports_mmx_ext() ? ", mmxext" : ""),
451 (supports_3dnow_prefetch() ? ", 3dnowpref" : ""), 452 (supports_3dnow_prefetch() ? ", 3dnowpref" : ""),
452 (supports_lzcnt() ? ", lzcnt": ""), 453 (supports_lzcnt() ? ", lzcnt": ""),
453 (supports_sse4a() ? ", sse4a": ""), 454 (supports_sse4a() ? ", sse4a": ""),
485 } 486 }
486 } else if (UseAES) { 487 } else if (UseAES) {
487 if (!FLAG_IS_DEFAULT(UseAES)) 488 if (!FLAG_IS_DEFAULT(UseAES))
488 warning("AES instructions not available on this CPU"); 489 warning("AES instructions not available on this CPU");
489 FLAG_SET_DEFAULT(UseAES, false); 490 FLAG_SET_DEFAULT(UseAES, false);
491 }
492
493 // Use CLMUL instructions if available.
494 if (supports_clmul()) {
495 if (FLAG_IS_DEFAULT(UseCLMUL)) {
496 UseCLMUL = true;
497 }
498 } else if (UseCLMUL) {
499 if (!FLAG_IS_DEFAULT(UseCLMUL))
500 warning("CLMUL instructions not available on this CPU (AVX may also be required)");
501 FLAG_SET_DEFAULT(UseCLMUL, false);
502 }
503
504 if (UseCLMUL && (UseAVX > 0) && (UseSSE > 2)) {
505 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
506 UseCRC32Intrinsics = true;
507 }
508 } else if (UseCRC32Intrinsics) {
509 if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics))
510 warning("CRC32 Intrinsics requires AVX and CLMUL instructions (not available on this CPU)");
511 FLAG_SET_DEFAULT(UseCRC32Intrinsics, false);
490 } 512 }
491 513
492 // The AES intrinsic stubs require AES instruction support (of course) 514 // The AES intrinsic stubs require AES instruction support (of course)
493 // but also require sse3 mode for instructions it use. 515 // but also require sse3 mode for instructions it use.
494 if (UseAES && (UseSSE > 2)) { 516 if (UseAES && (UseSSE > 2)) {