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comparison src/cpu/sparc/vm/sharedRuntime_sparc.cpp @ 113:ba764ed4b6f2

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6420645: Create a vm that uses compressed oops for up to 32gb heapsizes Summary: Compressed oops in instances, arrays, and headers. Code contributors are coleenp, phh, never, swamyv Reviewed-by: jmasa, kamg, acorn, tbell, kvn, rasbold
author coleenp
date Sun, 13 Apr 2008 17:43:42 -0400
parents a61af66fc99e
children 018d5b58dd4f
comparison
equal deleted inserted replaced
110:a49a647afe9a 113:ba764ed4b6f2
158 158
159 __ stx(O5, SP, o5_offset+STACK_BIAS); 159 __ stx(O5, SP, o5_offset+STACK_BIAS);
160 map->set_callee_saved(VMRegImpl::stack2reg((o5_offset + 4)>>2), O5->as_VMReg()); 160 map->set_callee_saved(VMRegImpl::stack2reg((o5_offset + 4)>>2), O5->as_VMReg());
161 #endif /* _LP64 */ 161 #endif /* _LP64 */
162 162
163
164 #ifdef _LP64
165 int debug_offset = 0;
166 #else
167 int debug_offset = 4;
168 #endif
163 // Save the G's 169 // Save the G's
164 __ stx(G1, SP, g1_offset+STACK_BIAS); 170 __ stx(G1, SP, g1_offset+STACK_BIAS);
165 map->set_callee_saved(VMRegImpl::stack2reg((g1_offset + 4)>>2), G1->as_VMReg()); 171 map->set_callee_saved(VMRegImpl::stack2reg((g1_offset + debug_offset)>>2), G1->as_VMReg());
166 172
167 __ stx(G3, SP, g3_offset+STACK_BIAS); 173 __ stx(G3, SP, g3_offset+STACK_BIAS);
168 map->set_callee_saved(VMRegImpl::stack2reg((g3_offset + 4)>>2), G3->as_VMReg()); 174 map->set_callee_saved(VMRegImpl::stack2reg((g3_offset + debug_offset)>>2), G3->as_VMReg());
169 175
170 __ stx(G4, SP, g4_offset+STACK_BIAS); 176 __ stx(G4, SP, g4_offset+STACK_BIAS);
171 map->set_callee_saved(VMRegImpl::stack2reg((g4_offset + 4)>>2), G4->as_VMReg()); 177 map->set_callee_saved(VMRegImpl::stack2reg((g4_offset + debug_offset)>>2), G4->as_VMReg());
172 178
173 __ stx(G5, SP, g5_offset+STACK_BIAS); 179 __ stx(G5, SP, g5_offset+STACK_BIAS);
174 map->set_callee_saved(VMRegImpl::stack2reg((g5_offset + 4)>>2), G5->as_VMReg()); 180 map->set_callee_saved(VMRegImpl::stack2reg((g5_offset + debug_offset)>>2), G5->as_VMReg());
175 181
176 // This is really a waste but we'll keep things as they were for now 182 // This is really a waste but we'll keep things as they were for now
177 if (true) { 183 if (true) {
178 #ifndef _LP64 184 #ifndef _LP64
179 map->set_callee_saved(VMRegImpl::stack2reg((o0_offset)>>2), O0->as_VMReg()->next()); 185 map->set_callee_saved(VMRegImpl::stack2reg((o0_offset)>>2), O0->as_VMReg()->next());
180 map->set_callee_saved(VMRegImpl::stack2reg((o1_offset)>>2), O1->as_VMReg()->next()); 186 map->set_callee_saved(VMRegImpl::stack2reg((o1_offset)>>2), O1->as_VMReg()->next());
181 map->set_callee_saved(VMRegImpl::stack2reg((o2_offset)>>2), O2->as_VMReg()->next()); 187 map->set_callee_saved(VMRegImpl::stack2reg((o2_offset)>>2), O2->as_VMReg()->next());
182 map->set_callee_saved(VMRegImpl::stack2reg((o3_offset)>>2), O3->as_VMReg()->next()); 188 map->set_callee_saved(VMRegImpl::stack2reg((o3_offset)>>2), O3->as_VMReg()->next());
183 map->set_callee_saved(VMRegImpl::stack2reg((o4_offset)>>2), O4->as_VMReg()->next()); 189 map->set_callee_saved(VMRegImpl::stack2reg((o4_offset)>>2), O4->as_VMReg()->next());
184 map->set_callee_saved(VMRegImpl::stack2reg((o5_offset)>>2), O5->as_VMReg()->next()); 190 map->set_callee_saved(VMRegImpl::stack2reg((o5_offset)>>2), O5->as_VMReg()->next());
185 #endif /* _LP64 */
186 map->set_callee_saved(VMRegImpl::stack2reg((g1_offset)>>2), G1->as_VMReg()->next()); 191 map->set_callee_saved(VMRegImpl::stack2reg((g1_offset)>>2), G1->as_VMReg()->next());
187 map->set_callee_saved(VMRegImpl::stack2reg((g3_offset)>>2), G3->as_VMReg()->next()); 192 map->set_callee_saved(VMRegImpl::stack2reg((g3_offset)>>2), G3->as_VMReg()->next());
188 map->set_callee_saved(VMRegImpl::stack2reg((g4_offset)>>2), G4->as_VMReg()->next()); 193 map->set_callee_saved(VMRegImpl::stack2reg((g4_offset)>>2), G4->as_VMReg()->next());
189 map->set_callee_saved(VMRegImpl::stack2reg((g5_offset)>>2), G5->as_VMReg()->next()); 194 map->set_callee_saved(VMRegImpl::stack2reg((g5_offset)>>2), G5->as_VMReg()->next());
195 #endif /* _LP64 */
190 } 196 }
191 197
192 198
193 // Save the flags 199 // Save the flags
194 __ rdccr( G5 ); 200 __ rdccr( G5 );
1215 1221
1216 Address ic_miss(G3_scratch, SharedRuntime::get_ic_miss_stub()); 1222 Address ic_miss(G3_scratch, SharedRuntime::get_ic_miss_stub());
1217 1223
1218 __ verify_oop(O0); 1224 __ verify_oop(O0);
1219 __ verify_oop(G5_method); 1225 __ verify_oop(G5_method);
1220 __ ld_ptr(O0, oopDesc::klass_offset_in_bytes(), G3_scratch); 1226 __ load_klass(O0, G3_scratch);
1221 __ verify_oop(G3_scratch); 1227 __ verify_oop(G3_scratch);
1222 1228
1223 #if !defined(_LP64) && defined(COMPILER2) 1229 #if !defined(_LP64) && defined(COMPILER2)
1224 __ save(SP, -frame::register_save_words*wordSize, SP); 1230 __ save(SP, -frame::register_save_words*wordSize, SP);
1225 __ ld_ptr(G5_method, compiledICHolderOopDesc::holder_klass_offset(), R_temp); 1231 __ ld_ptr(G5_method, compiledICHolderOopDesc::holder_klass_offset(), R_temp);
1818 { 1824 {
1819 Label L; 1825 Label L;
1820 const Register temp_reg = G3_scratch; 1826 const Register temp_reg = G3_scratch;
1821 Address ic_miss(temp_reg, SharedRuntime::get_ic_miss_stub()); 1827 Address ic_miss(temp_reg, SharedRuntime::get_ic_miss_stub());
1822 __ verify_oop(O0); 1828 __ verify_oop(O0);
1823 __ ld_ptr(O0, oopDesc::klass_offset_in_bytes(), temp_reg); 1829 __ load_klass(O0, temp_reg);
1824 __ cmp(temp_reg, G5_inline_cache_reg); 1830 __ cmp(temp_reg, G5_inline_cache_reg);
1825 __ brx(Assembler::equal, true, Assembler::pt, L); 1831 __ brx(Assembler::equal, true, Assembler::pt, L);
1826 __ delayed()->nop(); 1832 __ delayed()->nop();
1827 1833
1828 __ jump_to(ic_miss, 0); 1834 __ jump_to(ic_miss, 0);