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comparison src/cpu/x86/vm/vm_version_x86.cpp @ 643:c771b7f43bbf

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6378821: bitCount() should use POPC on SPARC processors and AMD+10h Summary: bitCount() should use POPC on SPARC processors where POPC is implemented directly in hardware. Reviewed-by: kvn, never
author twisti
date Fri, 13 Mar 2009 11:35:17 -0700
parents 22e09c0f4b47
children fbde8ec322d0
comparison
equal deleted inserted replaced
642:660978a2a31a 643:c771b7f43bbf
282 // HT processor could be installed on a system which doesn't support HT. 282 // HT processor could be installed on a system which doesn't support HT.
283 _cpuFeatures &= ~CPU_HT; 283 _cpuFeatures &= ~CPU_HT;
284 } 284 }
285 285
286 char buf[256]; 286 char buf[256];
287 jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", 287 jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
288 cores_per_cpu(), threads_per_core(), 288 cores_per_cpu(), threads_per_core(),
289 cpu_family(), _model, _stepping, 289 cpu_family(), _model, _stepping,
290 (supports_cmov() ? ", cmov" : ""), 290 (supports_cmov() ? ", cmov" : ""),
291 (supports_cmpxchg8() ? ", cx8" : ""), 291 (supports_cmpxchg8() ? ", cx8" : ""),
292 (supports_fxsr() ? ", fxsr" : ""), 292 (supports_fxsr() ? ", fxsr" : ""),
295 (supports_sse2() ? ", sse2" : ""), 295 (supports_sse2() ? ", sse2" : ""),
296 (supports_sse3() ? ", sse3" : ""), 296 (supports_sse3() ? ", sse3" : ""),
297 (supports_ssse3()? ", ssse3": ""), 297 (supports_ssse3()? ", ssse3": ""),
298 (supports_sse4_1() ? ", sse4.1" : ""), 298 (supports_sse4_1() ? ", sse4.1" : ""),
299 (supports_sse4_2() ? ", sse4.2" : ""), 299 (supports_sse4_2() ? ", sse4.2" : ""),
300 (supports_popcnt() ? ", popcnt" : ""),
300 (supports_mmx_ext() ? ", mmxext" : ""), 301 (supports_mmx_ext() ? ", mmxext" : ""),
301 (supports_3dnow() ? ", 3dnow" : ""), 302 (supports_3dnow() ? ", 3dnow" : ""),
302 (supports_3dnow2() ? ", 3dnowext" : ""), 303 (supports_3dnow2() ? ", 3dnowext" : ""),
303 (supports_sse4a() ? ", sse4a": ""), 304 (supports_sse4a() ? ", sse4a": ""),
304 (supports_ht() ? ", ht": "")); 305 (supports_ht() ? ", ht": ""));
405 if( supports_sse4_2() && supports_ht() ) { // Newest Intel cpus 406 if( supports_sse4_2() && supports_ht() ) { // Newest Intel cpus
406 if( FLAG_IS_DEFAULT(UseUnalignedLoadStores) && UseXMMForArrayCopy ) { 407 if( FLAG_IS_DEFAULT(UseUnalignedLoadStores) && UseXMMForArrayCopy ) {
407 UseUnalignedLoadStores = true; // use movdqu on newest Intel cpus 408 UseUnalignedLoadStores = true; // use movdqu on newest Intel cpus
408 } 409 }
409 } 410 }
411 }
412 }
413
414 // Use population count instruction if available.
415 if (supports_popcnt()) {
416 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
417 UsePopCountInstruction = true;
410 } 418 }
411 } 419 }
412 420
413 assert(0 <= ReadPrefetchInstr && ReadPrefetchInstr <= 3, "invalid value"); 421 assert(0 <= ReadPrefetchInstr && ReadPrefetchInstr <= 3, "invalid value");
414 assert(0 <= AllocatePrefetchInstr && AllocatePrefetchInstr <= 3, "invalid value"); 422 assert(0 <= AllocatePrefetchInstr && AllocatePrefetchInstr <= 3, "invalid value");