Mercurial > hg > truffle
comparison src/cpu/sparc/vm/sparc.ad @ 3842:c7b60b601eb4
7069452: Cleanup NodeFlags
Summary: Remove flags which duplicate information in Node::NodeClasses.
Reviewed-by: never
author | kvn |
---|---|
date | Wed, 27 Jul 2011 17:28:36 -0700 |
parents | 3d42f82cd811 |
children | f1c12354c3f7 |
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deleted
inserted
replaced
3841:0f34fdee809e | 3842:c7b60b601eb4 |
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3312 //----------Operand Attributes------------------------------------------------- | 3312 //----------Operand Attributes------------------------------------------------- |
3313 op_attrib op_cost(1); // Required cost attribute | 3313 op_attrib op_cost(1); // Required cost attribute |
3314 | 3314 |
3315 //----------Instruction Attributes--------------------------------------------- | 3315 //----------Instruction Attributes--------------------------------------------- |
3316 ins_attrib ins_cost(DEFAULT_COST); // Required cost attribute | 3316 ins_attrib ins_cost(DEFAULT_COST); // Required cost attribute |
3317 ins_attrib ins_size(32); // Required size attribute (in bits) | 3317 ins_attrib ins_size(32); // Required size attribute (in bits) |
3318 ins_attrib ins_pc_relative(0); // Required PC Relative flag | 3318 ins_attrib ins_short_branch(0); // Required flag: is this instruction a |
3319 ins_attrib ins_short_branch(0); // Required flag: is this instruction a | 3319 // non-matching short branch variant of some |
3320 // non-matching short branch variant of some | |
3321 // long branch? | 3320 // long branch? |
3322 | 3321 |
3323 //----------OPERANDS----------------------------------------------------------- | 3322 //----------OPERANDS----------------------------------------------------------- |
3324 // Operand definitions must precede instruction definitions for correct parsing | 3323 // Operand definitions must precede instruction definitions for correct parsing |
3325 // in the ADLC because operands constitute user defined types which are used in | 3324 // in the ADLC because operands constitute user defined types which are used in |
9180 // Jump to base address + switch value | 9179 // Jump to base address + switch value |
9181 __ ld_ptr(table_reg, $switch_val$$Register, label_reg); | 9180 __ ld_ptr(table_reg, $switch_val$$Register, label_reg); |
9182 __ jmp(label_reg, G0); | 9181 __ jmp(label_reg, G0); |
9183 __ delayed()->nop(); | 9182 __ delayed()->nop(); |
9184 %} | 9183 %} |
9185 ins_pc_relative(1); | |
9186 ins_pipe(ialu_reg_reg); | 9184 ins_pipe(ialu_reg_reg); |
9187 %} | 9185 %} |
9188 | 9186 |
9189 // Direct Branch. Use V8 version with longer range. | 9187 // Direct Branch. Use V8 version with longer range. |
9190 instruct branch(label labl) %{ | 9188 instruct branch(label labl) %{ |
9197 ins_encode %{ | 9195 ins_encode %{ |
9198 Label* L = $labl$$label; | 9196 Label* L = $labl$$label; |
9199 __ ba(*L); | 9197 __ ba(*L); |
9200 __ delayed()->nop(); | 9198 __ delayed()->nop(); |
9201 %} | 9199 %} |
9202 ins_pc_relative(1); | |
9203 ins_pipe(br); | 9200 ins_pipe(br); |
9204 %} | 9201 %} |
9205 | 9202 |
9206 // Conditional Direct Branch | 9203 // Conditional Direct Branch |
9207 instruct branchCon(cmpOp cmp, flagsReg icc, label labl) %{ | 9204 instruct branchCon(cmpOp cmp, flagsReg icc, label labl) %{ |
9211 size(8); | 9208 size(8); |
9212 ins_cost(BRANCH_COST); | 9209 ins_cost(BRANCH_COST); |
9213 format %{ "BP$cmp $icc,$labl" %} | 9210 format %{ "BP$cmp $icc,$labl" %} |
9214 // Prim = bits 24-22, Secnd = bits 31-30 | 9211 // Prim = bits 24-22, Secnd = bits 31-30 |
9215 ins_encode( enc_bp( labl, cmp, icc ) ); | 9212 ins_encode( enc_bp( labl, cmp, icc ) ); |
9216 ins_pc_relative(1); | |
9217 ins_pipe(br_cc); | 9213 ins_pipe(br_cc); |
9218 %} | 9214 %} |
9219 | 9215 |
9220 // Branch-on-register tests all 64 bits. We assume that values | 9216 // Branch-on-register tests all 64 bits. We assume that values |
9221 // in 64-bit registers always remains zero or sign extended | 9217 // in 64-bit registers always remains zero or sign extended |
9228 | 9224 |
9229 size(8); | 9225 size(8); |
9230 ins_cost(BRANCH_COST); | 9226 ins_cost(BRANCH_COST); |
9231 format %{ "BR$cmp $op1,$labl" %} | 9227 format %{ "BR$cmp $op1,$labl" %} |
9232 ins_encode( enc_bpr( labl, cmp, op1 ) ); | 9228 ins_encode( enc_bpr( labl, cmp, op1 ) ); |
9233 ins_pc_relative(1); | |
9234 ins_pipe(br_reg); | 9229 ins_pipe(br_reg); |
9235 %} | 9230 %} |
9236 | 9231 |
9237 instruct branchCon_regP(cmpOp_reg cmp, iRegP op1, immP0 null, label labl) %{ | 9232 instruct branchCon_regP(cmpOp_reg cmp, iRegP op1, immP0 null, label labl) %{ |
9238 match(If cmp (CmpP op1 null)); | 9233 match(If cmp (CmpP op1 null)); |
9241 | 9236 |
9242 size(8); | 9237 size(8); |
9243 ins_cost(BRANCH_COST); | 9238 ins_cost(BRANCH_COST); |
9244 format %{ "BR$cmp $op1,$labl" %} | 9239 format %{ "BR$cmp $op1,$labl" %} |
9245 ins_encode( enc_bpr( labl, cmp, op1 ) ); | 9240 ins_encode( enc_bpr( labl, cmp, op1 ) ); |
9246 ins_pc_relative(1); | |
9247 ins_pipe(br_reg); | 9241 ins_pipe(br_reg); |
9248 %} | 9242 %} |
9249 | 9243 |
9250 instruct branchCon_regL(cmpOp_reg cmp, iRegL op1, immL0 zero, label labl) %{ | 9244 instruct branchCon_regL(cmpOp_reg cmp, iRegL op1, immL0 zero, label labl) %{ |
9251 match(If cmp (CmpL op1 zero)); | 9245 match(If cmp (CmpL op1 zero)); |
9254 | 9248 |
9255 size(8); | 9249 size(8); |
9256 ins_cost(BRANCH_COST); | 9250 ins_cost(BRANCH_COST); |
9257 format %{ "BR$cmp $op1,$labl" %} | 9251 format %{ "BR$cmp $op1,$labl" %} |
9258 ins_encode( enc_bpr( labl, cmp, op1 ) ); | 9252 ins_encode( enc_bpr( labl, cmp, op1 ) ); |
9259 ins_pc_relative(1); | |
9260 ins_pipe(br_reg); | 9253 ins_pipe(br_reg); |
9261 %} | 9254 %} |
9262 | 9255 |
9263 instruct branchConU(cmpOpU cmp, flagsRegU icc, label labl) %{ | 9256 instruct branchConU(cmpOpU cmp, flagsRegU icc, label labl) %{ |
9264 match(If cmp icc); | 9257 match(If cmp icc); |
9265 effect(USE labl); | 9258 effect(USE labl); |
9266 | 9259 |
9267 format %{ "BP$cmp $icc,$labl" %} | 9260 format %{ "BP$cmp $icc,$labl" %} |
9268 // Prim = bits 24-22, Secnd = bits 31-30 | 9261 // Prim = bits 24-22, Secnd = bits 31-30 |
9269 ins_encode( enc_bp( labl, cmp, icc ) ); | 9262 ins_encode( enc_bp( labl, cmp, icc ) ); |
9270 ins_pc_relative(1); | |
9271 ins_pipe(br_cc); | 9263 ins_pipe(br_cc); |
9272 %} | 9264 %} |
9273 | 9265 |
9274 instruct branchConP(cmpOpP cmp, flagsRegP pcc, label labl) %{ | 9266 instruct branchConP(cmpOpP cmp, flagsRegP pcc, label labl) %{ |
9275 match(If cmp pcc); | 9267 match(If cmp pcc); |
9284 cbuf.is_backward_branch(*L) ? Assembler::pt : Assembler::pn; | 9276 cbuf.is_backward_branch(*L) ? Assembler::pt : Assembler::pn; |
9285 | 9277 |
9286 __ bp( (Assembler::Condition)($cmp$$cmpcode), false, Assembler::ptr_cc, predict_taken, *L); | 9278 __ bp( (Assembler::Condition)($cmp$$cmpcode), false, Assembler::ptr_cc, predict_taken, *L); |
9287 __ delayed()->nop(); | 9279 __ delayed()->nop(); |
9288 %} | 9280 %} |
9289 ins_pc_relative(1); | |
9290 ins_pipe(br_cc); | 9281 ins_pipe(br_cc); |
9291 %} | 9282 %} |
9292 | 9283 |
9293 instruct branchConF(cmpOpF cmp, flagsRegF fcc, label labl) %{ | 9284 instruct branchConF(cmpOpF cmp, flagsRegF fcc, label labl) %{ |
9294 match(If cmp fcc); | 9285 match(If cmp fcc); |
9303 cbuf.is_backward_branch(*L) ? Assembler::pt : Assembler::pn; | 9294 cbuf.is_backward_branch(*L) ? Assembler::pt : Assembler::pn; |
9304 | 9295 |
9305 __ fbp( (Assembler::Condition)($cmp$$cmpcode), false, (Assembler::CC)($fcc$$reg), predict_taken, *L); | 9296 __ fbp( (Assembler::Condition)($cmp$$cmpcode), false, (Assembler::CC)($fcc$$reg), predict_taken, *L); |
9306 __ delayed()->nop(); | 9297 __ delayed()->nop(); |
9307 %} | 9298 %} |
9308 ins_pc_relative(1); | |
9309 ins_pipe(br_fcc); | 9299 ins_pipe(br_fcc); |
9310 %} | 9300 %} |
9311 | 9301 |
9312 instruct branchLoopEnd(cmpOp cmp, flagsReg icc, label labl) %{ | 9302 instruct branchLoopEnd(cmpOp cmp, flagsReg icc, label labl) %{ |
9313 match(CountedLoopEnd cmp icc); | 9303 match(CountedLoopEnd cmp icc); |
9316 size(8); | 9306 size(8); |
9317 ins_cost(BRANCH_COST); | 9307 ins_cost(BRANCH_COST); |
9318 format %{ "BP$cmp $icc,$labl\t! Loop end" %} | 9308 format %{ "BP$cmp $icc,$labl\t! Loop end" %} |
9319 // Prim = bits 24-22, Secnd = bits 31-30 | 9309 // Prim = bits 24-22, Secnd = bits 31-30 |
9320 ins_encode( enc_bp( labl, cmp, icc ) ); | 9310 ins_encode( enc_bp( labl, cmp, icc ) ); |
9321 ins_pc_relative(1); | |
9322 ins_pipe(br_cc); | 9311 ins_pipe(br_cc); |
9323 %} | 9312 %} |
9324 | 9313 |
9325 instruct branchLoopEndU(cmpOpU cmp, flagsRegU icc, label labl) %{ | 9314 instruct branchLoopEndU(cmpOpU cmp, flagsRegU icc, label labl) %{ |
9326 match(CountedLoopEnd cmp icc); | 9315 match(CountedLoopEnd cmp icc); |
9329 size(8); | 9318 size(8); |
9330 ins_cost(BRANCH_COST); | 9319 ins_cost(BRANCH_COST); |
9331 format %{ "BP$cmp $icc,$labl\t! Loop end" %} | 9320 format %{ "BP$cmp $icc,$labl\t! Loop end" %} |
9332 // Prim = bits 24-22, Secnd = bits 31-30 | 9321 // Prim = bits 24-22, Secnd = bits 31-30 |
9333 ins_encode( enc_bp( labl, cmp, icc ) ); | 9322 ins_encode( enc_bp( labl, cmp, icc ) ); |
9334 ins_pc_relative(1); | |
9335 ins_pipe(br_cc); | 9323 ins_pipe(br_cc); |
9336 %} | 9324 %} |
9337 | 9325 |
9338 // ============================================================================ | 9326 // ============================================================================ |
9339 // Long Compare | 9327 // Long Compare |
9369 cbuf.is_backward_branch(*L) ? Assembler::pt : Assembler::pn; | 9357 cbuf.is_backward_branch(*L) ? Assembler::pt : Assembler::pn; |
9370 | 9358 |
9371 __ bp( (Assembler::Condition)($cmp$$cmpcode), false, Assembler::xcc, predict_taken, *L); | 9359 __ bp( (Assembler::Condition)($cmp$$cmpcode), false, Assembler::xcc, predict_taken, *L); |
9372 __ delayed()->nop(); | 9360 __ delayed()->nop(); |
9373 %} | 9361 %} |
9374 ins_pc_relative(1); | |
9375 ins_pipe(br_cc); | 9362 ins_pipe(br_cc); |
9376 %} | 9363 %} |
9377 | 9364 |
9378 // Manifest a CmpL3 result in an integer register. Very painful. | 9365 // Manifest a CmpL3 result in an integer register. Very painful. |
9379 // This is the test to avoid. | 9366 // This is the test to avoid. |
9497 | 9484 |
9498 size(8); | 9485 size(8); |
9499 ins_cost(CALL_COST); | 9486 ins_cost(CALL_COST); |
9500 format %{ "CALL,static ; NOP ==> " %} | 9487 format %{ "CALL,static ; NOP ==> " %} |
9501 ins_encode( Java_Static_Call( meth ), call_epilog ); | 9488 ins_encode( Java_Static_Call( meth ), call_epilog ); |
9502 ins_pc_relative(1); | |
9503 ins_pipe(simple_call); | 9489 ins_pipe(simple_call); |
9504 %} | 9490 %} |
9505 | 9491 |
9506 // Call Java Static Instruction (method handle version) | 9492 // Call Java Static Instruction (method handle version) |
9507 instruct CallStaticJavaHandle(method meth, l7RegP l7_mh_SP_save) %{ | 9493 instruct CallStaticJavaHandle(method meth, l7RegP l7_mh_SP_save) %{ |
9511 | 9497 |
9512 size(8); | 9498 size(8); |
9513 ins_cost(CALL_COST); | 9499 ins_cost(CALL_COST); |
9514 format %{ "CALL,static/MethodHandle" %} | 9500 format %{ "CALL,static/MethodHandle" %} |
9515 ins_encode(preserve_SP, Java_Static_Call(meth), restore_SP, call_epilog); | 9501 ins_encode(preserve_SP, Java_Static_Call(meth), restore_SP, call_epilog); |
9516 ins_pc_relative(1); | |
9517 ins_pipe(simple_call); | 9502 ins_pipe(simple_call); |
9518 %} | 9503 %} |
9519 | 9504 |
9520 // Call Java Dynamic Instruction | 9505 // Call Java Dynamic Instruction |
9521 instruct CallDynamicJavaDirect( method meth ) %{ | 9506 instruct CallDynamicJavaDirect( method meth ) %{ |
9524 | 9509 |
9525 ins_cost(CALL_COST); | 9510 ins_cost(CALL_COST); |
9526 format %{ "SET (empty),R_G5\n\t" | 9511 format %{ "SET (empty),R_G5\n\t" |
9527 "CALL,dynamic ; NOP ==> " %} | 9512 "CALL,dynamic ; NOP ==> " %} |
9528 ins_encode( Java_Dynamic_Call( meth ), call_epilog ); | 9513 ins_encode( Java_Dynamic_Call( meth ), call_epilog ); |
9529 ins_pc_relative(1); | |
9530 ins_pipe(call); | 9514 ins_pipe(call); |
9531 %} | 9515 %} |
9532 | 9516 |
9533 // Call Runtime Instruction | 9517 // Call Runtime Instruction |
9534 instruct CallRuntimeDirect(method meth, l7RegP l7) %{ | 9518 instruct CallRuntimeDirect(method meth, l7RegP l7) %{ |
9536 effect(USE meth, KILL l7); | 9520 effect(USE meth, KILL l7); |
9537 ins_cost(CALL_COST); | 9521 ins_cost(CALL_COST); |
9538 format %{ "CALL,runtime" %} | 9522 format %{ "CALL,runtime" %} |
9539 ins_encode( Java_To_Runtime( meth ), | 9523 ins_encode( Java_To_Runtime( meth ), |
9540 call_epilog, adjust_long_from_native_call ); | 9524 call_epilog, adjust_long_from_native_call ); |
9541 ins_pc_relative(1); | |
9542 ins_pipe(simple_call); | 9525 ins_pipe(simple_call); |
9543 %} | 9526 %} |
9544 | 9527 |
9545 // Call runtime without safepoint - same as CallRuntime | 9528 // Call runtime without safepoint - same as CallRuntime |
9546 instruct CallLeafDirect(method meth, l7RegP l7) %{ | 9529 instruct CallLeafDirect(method meth, l7RegP l7) %{ |
9549 ins_cost(CALL_COST); | 9532 ins_cost(CALL_COST); |
9550 format %{ "CALL,runtime leaf" %} | 9533 format %{ "CALL,runtime leaf" %} |
9551 ins_encode( Java_To_Runtime( meth ), | 9534 ins_encode( Java_To_Runtime( meth ), |
9552 call_epilog, | 9535 call_epilog, |
9553 adjust_long_from_native_call ); | 9536 adjust_long_from_native_call ); |
9554 ins_pc_relative(1); | |
9555 ins_pipe(simple_call); | 9537 ins_pipe(simple_call); |
9556 %} | 9538 %} |
9557 | 9539 |
9558 // Call runtime without safepoint - same as CallLeaf | 9540 // Call runtime without safepoint - same as CallLeaf |
9559 instruct CallLeafNoFPDirect(method meth, l7RegP l7) %{ | 9541 instruct CallLeafNoFPDirect(method meth, l7RegP l7) %{ |
9562 ins_cost(CALL_COST); | 9544 ins_cost(CALL_COST); |
9563 format %{ "CALL,runtime leaf nofp" %} | 9545 format %{ "CALL,runtime leaf nofp" %} |
9564 ins_encode( Java_To_Runtime( meth ), | 9546 ins_encode( Java_To_Runtime( meth ), |
9565 call_epilog, | 9547 call_epilog, |
9566 adjust_long_from_native_call ); | 9548 adjust_long_from_native_call ); |
9567 ins_pc_relative(1); | |
9568 ins_pipe(simple_call); | 9549 ins_pipe(simple_call); |
9569 %} | 9550 %} |
9570 | 9551 |
9571 // Tail Call; Jump from runtime stub to Java code. | 9552 // Tail Call; Jump from runtime stub to Java code. |
9572 // Also known as an 'interprocedural jump'. | 9553 // Also known as an 'interprocedural jump'. |