Mercurial > hg > truffle

comparison src/cpu/x86/vm/x86_64.ad @ 12323:c9ccd7b85f20

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
8024924: Intrinsify java.lang.Math.addExact Reviewed-by: kvn, twisti
author rbackman
date Fri, 27 Sep 2013 08:39:19 +0200
parents 7944aba7ba41
children 268e7a2178d7
comparison
equal deleted inserted replaced
12322:72b7e96c1922 12323:c9ccd7b85f20
1647 1647
1648 const RegMask Matcher::method_handle_invoke_SP_save_mask() { 1648 const RegMask Matcher::method_handle_invoke_SP_save_mask() {
1649 return PTR_RBP_REG_mask(); 1649 return PTR_RBP_REG_mask();
1650 } 1650 }
1651 1651
1652 const RegMask Matcher::mathExactI_result_proj_mask() {
1653 return INT_RAX_REG_mask();
1654 }
1655
1656 const RegMask Matcher::mathExactI_flags_proj_mask() {
1657 return INT_FLAGS_mask();
1658 }
1659
1652 %} 1660 %}
1653 1661
1654 //----------ENCODING BLOCK----------------------------------------------------- 1662 //----------ENCODING BLOCK-----------------------------------------------------
1655 // This block specifies the encoding classes used by the compiler to 1663 // This block specifies the encoding classes used by the compiler to
1656 // output byte streams. Encoding classes are parameterized macros 1664 // output byte streams. Encoding classes are parameterized macros
4131 not_equal(0x5, "ne"); 4139 not_equal(0x5, "ne");
4132 less(0xC, "l"); 4140 less(0xC, "l");
4133 greater_equal(0xD, "ge"); 4141 greater_equal(0xD, "ge");
4134 less_equal(0xE, "le"); 4142 less_equal(0xE, "le");
4135 greater(0xF, "g"); 4143 greater(0xF, "g");
4144 overflow(0x0, "o");
4145 no_overflow(0x1, "no");
4136 %} 4146 %}
4137 %} 4147 %}
4138 4148
4139 // Comparison Code, unsigned compare. Used by FP also, with 4149 // Comparison Code, unsigned compare. Used by FP also, with
4140 // C2 (unordered) turned into GT or LT already. The other bits 4150 // C2 (unordered) turned into GT or LT already. The other bits
4149 not_equal(0x5, "ne"); 4159 not_equal(0x5, "ne");
4150 less(0x2, "b"); 4160 less(0x2, "b");
4151 greater_equal(0x3, "nb"); 4161 greater_equal(0x3, "nb");
4152 less_equal(0x6, "be"); 4162 less_equal(0x6, "be");
4153 greater(0x7, "nbe"); 4163 greater(0x7, "nbe");
4164 overflow(0x0, "o");
4165 no_overflow(0x1, "no");
4154 %} 4166 %}
4155 %} 4167 %}
4156 4168
4157 4169
4158 // Floating comparisons that don't require any fixup for the unordered case 4170 // Floating comparisons that don't require any fixup for the unordered case
4168 not_equal(0x5, "ne"); 4180 not_equal(0x5, "ne");
4169 less(0x2, "b"); 4181 less(0x2, "b");
4170 greater_equal(0x3, "nb"); 4182 greater_equal(0x3, "nb");
4171 less_equal(0x6, "be"); 4183 less_equal(0x6, "be");
4172 greater(0x7, "nbe"); 4184 greater(0x7, "nbe");
4185 overflow(0x0, "o");
4186 no_overflow(0x1, "no");
4173 %} 4187 %}
4174 %} 4188 %}
4175 4189
4176 4190
4177 // Floating comparisons that can be fixed up with extra conditional jumps 4191 // Floating comparisons that can be fixed up with extra conditional jumps
4185 not_equal(0x5, "ne"); 4199 not_equal(0x5, "ne");
4186 less(0x2, "b"); 4200 less(0x2, "b");
4187 greater_equal(0x3, "nb"); 4201 greater_equal(0x3, "nb");
4188 less_equal(0x6, "be"); 4202 less_equal(0x6, "be");
4189 greater(0x7, "nbe"); 4203 greater(0x7, "nbe");
4204 overflow(0x0, "o");
4205 no_overflow(0x1, "no");
4190 %} 4206 %}
4191 %} 4207 %}
4192 4208
4193 4209
4194 //----------OPERAND CLASSES---------------------------------------------------- 4210 //----------OPERAND CLASSES----------------------------------------------------
6919 %} 6935 %}
6920 %} 6936 %}
6921 6937
6922 //----------Arithmetic Instructions-------------------------------------------- 6938 //----------Arithmetic Instructions--------------------------------------------
6923 //----------Addition Instructions---------------------------------------------- 6939 //----------Addition Instructions----------------------------------------------
6940
6941 instruct addExactI_rReg(rax_RegI dst, rRegI src, rFlagsReg cr)
6942 %{
6943 match(AddExactI dst src);
6944 effect(DEF cr);
6945
6946 format %{ "addl $dst, $src\t# addExact int" %}
6947 ins_encode %{
6948 __ addl($dst$$Register, $src$$Register);
6949 %}
6950 ins_pipe(ialu_reg_reg);
6951 %}
6952
6953 instruct addExactI_rReg_imm(rax_RegI dst, immI src, rFlagsReg cr)
6954 %{
6955 match(AddExactI dst src);
6956 effect(DEF cr);
6957
6958 format %{ "addl $dst, $src\t# addExact int" %}
6959 ins_encode %{
6960 __ addl($dst$$Register, $src$$constant);
6961 %}
6962 ins_pipe(ialu_reg_reg);
6963 %}
6924 6964
6925 instruct addI_rReg(rRegI dst, rRegI src, rFlagsReg cr) 6965 instruct addI_rReg(rRegI dst, rRegI src, rFlagsReg cr)
6926 %{ 6966 %{
6927 match(Set dst (AddI dst src)); 6967 match(Set dst (AddI dst src));
6928 effect(KILL cr); 6968 effect(KILL cr);