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comparison src/cpu/x86/vm/c1_LIRAssembler_x86.cpp @ 3401:ccf072cdba91

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7046893: LP64 problem with double_quadword in c1_LIRAssembler_x86.cpp Summary: Fixed invalid casts in address computation Reviewed-by: kvn, never Contributed-by: thomas.salter@unisys.com
author iveresov
date Tue, 24 May 2011 15:30:05 -0700
parents 15c9a0e16269
children 442ef93966a9
comparison
equal deleted inserted replaced
3400:7523488edce5 3401:ccf072cdba91
45 45
46 // Note: 'double' and 'long long' have 32-bits alignment on x86. 46 // Note: 'double' and 'long long' have 32-bits alignment on x86.
47 static jlong* double_quadword(jlong *adr, jlong lo, jlong hi) { 47 static jlong* double_quadword(jlong *adr, jlong lo, jlong hi) {
48 // Use the expression (adr)&(~0xF) to provide 128-bits aligned address 48 // Use the expression (adr)&(~0xF) to provide 128-bits aligned address
49 // of 128-bits operands for SSE instructions. 49 // of 128-bits operands for SSE instructions.
50 jlong *operand = (jlong*)(((long)adr)&((long)(~0xF))); 50 jlong *operand = (jlong*)(((intptr_t)adr) & ((intptr_t)(~0xF)));
51 // Store the value to a 128-bits operand. 51 // Store the value to a 128-bits operand.
52 operand[0] = lo; 52 operand[0] = lo;
53 operand[1] = hi; 53 operand[1] = hi;
54 return operand; 54 return operand;
55 } 55 }