comparison src/cpu/x86/vm/x86_32.ad @ 671:d0994e5bebce

6822204: volatile fences should prefer lock:addl to actual mfence instructions Reviewed-by: kvn, phh
author never
date Thu, 26 Mar 2009 14:31:45 -0700
parents bd441136a5ce
children fbde8ec322d0
comparison
equal deleted inserted replaced
668:90a66aa50514 671:d0994e5bebce
4286 // FMULP src2,ST /* DE C8+i */ 4286 // FMULP src2,ST /* DE C8+i */
4287 emit_opcode(cbuf, 0xDE); 4287 emit_opcode(cbuf, 0xDE);
4288 emit_opcode(cbuf, 0xC8 + $src2$$reg); 4288 emit_opcode(cbuf, 0xC8 + $src2$$reg);
4289 %} 4289 %}
4290 4290
4291 enc_class enc_membar_acquire %{
4292 // Doug Lea believes this is not needed with current Sparcs and TSO.
4293 // MacroAssembler masm(&cbuf);
4294 // masm.membar();
4295 %}
4296
4297 enc_class enc_membar_release %{
4298 // Doug Lea believes this is not needed with current Sparcs and TSO.
4299 // MacroAssembler masm(&cbuf);
4300 // masm.membar();
4301 %}
4302
4303 enc_class enc_membar_volatile %{
4304 MacroAssembler masm(&cbuf);
4305 masm.membar(Assembler::Membar_mask_bits(Assembler::StoreLoad |
4306 Assembler::StoreStore));
4307 %}
4308
4309 // Atomically load the volatile long 4291 // Atomically load the volatile long
4310 enc_class enc_loadL_volatile( memory mem, stackSlotL dst ) %{ 4292 enc_class enc_loadL_volatile( memory mem, stackSlotL dst ) %{
4311 emit_opcode(cbuf,0xDF); 4293 emit_opcode(cbuf,0xDF);
4312 int rm_byte_opcode = 0x05; 4294 int rm_byte_opcode = 0x05;
4313 int base = $mem$$base; 4295 int base = $mem$$base;
7496 instruct membar_acquire() %{ 7478 instruct membar_acquire() %{
7497 match(MemBarAcquire); 7479 match(MemBarAcquire);
7498 ins_cost(400); 7480 ins_cost(400);
7499 7481
7500 size(0); 7482 size(0);
7501 format %{ "MEMBAR-acquire" %} 7483 format %{ "MEMBAR-acquire ! (empty encoding)" %}
7502 ins_encode( enc_membar_acquire ); 7484 ins_encode();
7503 ins_pipe(pipe_slow); 7485 ins_pipe(empty);
7504 %} 7486 %}
7505 7487
7506 instruct membar_acquire_lock() %{ 7488 instruct membar_acquire_lock() %{
7507 match(MemBarAcquire); 7489 match(MemBarAcquire);
7508 predicate(Matcher::prior_fast_lock(n)); 7490 predicate(Matcher::prior_fast_lock(n));
7517 instruct membar_release() %{ 7499 instruct membar_release() %{
7518 match(MemBarRelease); 7500 match(MemBarRelease);
7519 ins_cost(400); 7501 ins_cost(400);
7520 7502
7521 size(0); 7503 size(0);
7522 format %{ "MEMBAR-release" %} 7504 format %{ "MEMBAR-release ! (empty encoding)" %}
7523 ins_encode( enc_membar_release ); 7505 ins_encode( );
7524 ins_pipe(pipe_slow); 7506 ins_pipe(empty);
7525 %} 7507 %}
7526 7508
7527 instruct membar_release_lock() %{ 7509 instruct membar_release_lock() %{
7528 match(MemBarRelease); 7510 match(MemBarRelease);
7529 predicate(Matcher::post_fast_unlock(n)); 7511 predicate(Matcher::post_fast_unlock(n));
7533 format %{ "MEMBAR-release (a FastUnlock follows so empty encoding)" %} 7515 format %{ "MEMBAR-release (a FastUnlock follows so empty encoding)" %}
7534 ins_encode( ); 7516 ins_encode( );
7535 ins_pipe(empty); 7517 ins_pipe(empty);
7536 %} 7518 %}
7537 7519
7538 instruct membar_volatile() %{ 7520 instruct membar_volatile(eFlagsReg cr) %{
7539 match(MemBarVolatile); 7521 match(MemBarVolatile);
7522 effect(KILL cr);
7540 ins_cost(400); 7523 ins_cost(400);
7541 7524
7542 format %{ "MEMBAR-volatile" %} 7525 format %{
7543 ins_encode( enc_membar_volatile ); 7526 $$template
7527 if (os::is_MP()) {
7528 $$emit$$"LOCK ADDL [ESP + #0], 0\t! membar_volatile"
7529 } else {
7530 $$emit$$"MEMBAR-volatile ! (empty encoding)"
7531 }
7532 %}
7533 ins_encode %{
7534 __ membar(Assembler::StoreLoad);
7535 %}
7544 ins_pipe(pipe_slow); 7536 ins_pipe(pipe_slow);
7545 %} 7537 %}
7546 7538
7547 instruct unnecessary_membar_volatile() %{ 7539 instruct unnecessary_membar_volatile() %{
7548 match(MemBarVolatile); 7540 match(MemBarVolatile);