Mercurial > hg > truffle
comparison src/cpu/x86/vm/x86_32.ad @ 4047:d8cb48376797
7097546: Optimize use of CMOVE instructions
Summary: Avoid CMove in a loop if possible. May generate CMove if it could be moved outside a loop.
Reviewed-by: never
author | kvn |
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date | Wed, 26 Oct 2011 06:08:56 -0700 |
parents | 1af104d6cf99 |
children | 6729bbc1fcd6 |
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inserted
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4046:e69a66a1457b | 4047:d8cb48376797 |
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1390 // The ecx parameter to rep stos for the ClearArray node is in dwords. | 1390 // The ecx parameter to rep stos for the ClearArray node is in dwords. |
1391 const bool Matcher::init_array_count_is_in_bytes = false; | 1391 const bool Matcher::init_array_count_is_in_bytes = false; |
1392 | 1392 |
1393 // Threshold size for cleararray. | 1393 // Threshold size for cleararray. |
1394 const int Matcher::init_array_short_size = 8 * BytesPerLong; | 1394 const int Matcher::init_array_short_size = 8 * BytesPerLong; |
1395 | |
1396 // Needs 2 CMOV's for longs. | |
1397 const int Matcher::long_cmove_cost() { return 1; } | |
1398 | |
1399 // No CMOVF/CMOVD with SSE/SSE2 | |
1400 const int Matcher::float_cmove_cost() { return (UseSSE>=1) ? ConditionalMoveLimit : 0; } | |
1395 | 1401 |
1396 // Should the Matcher clone shifts on addressing modes, expecting them to | 1402 // Should the Matcher clone shifts on addressing modes, expecting them to |
1397 // be subsumed into complex addressing expressions or compute them into | 1403 // be subsumed into complex addressing expressions or compute them into |
1398 // registers? True for Intel but false for most RISCs | 1404 // registers? True for Intel but false for most RISCs |
1399 const bool Matcher::clone_shift_expressions = true; | 1405 const bool Matcher::clone_shift_expressions = true; |
7903 ins_pipe( ialu_reg_reg ); | 7909 ins_pipe( ialu_reg_reg ); |
7904 %} | 7910 %} |
7905 | 7911 |
7906 //----------Conditional Move--------------------------------------------------- | 7912 //----------Conditional Move--------------------------------------------------- |
7907 // Conditional move | 7913 // Conditional move |
7914 instruct jmovI_reg(cmpOp cop, eFlagsReg cr, eRegI dst, eRegI src) %{ | |
7915 predicate(!VM_Version::supports_cmov() ); | |
7916 match(Set dst (CMoveI (Binary cop cr) (Binary dst src))); | |
7917 ins_cost(200); | |
7918 format %{ "J$cop,us skip\t# signed cmove\n\t" | |
7919 "MOV $dst,$src\n" | |
7920 "skip:" %} | |
7921 ins_encode %{ | |
7922 Label Lskip; | |
7923 // Invert sense of branch from sense of CMOV | |
7924 __ jccb((Assembler::Condition)($cop$$cmpcode^1), Lskip); | |
7925 __ movl($dst$$Register, $src$$Register); | |
7926 __ bind(Lskip); | |
7927 %} | |
7928 ins_pipe( pipe_cmov_reg ); | |
7929 %} | |
7930 | |
7931 instruct jmovI_regU(cmpOpU cop, eFlagsRegU cr, eRegI dst, eRegI src) %{ | |
7932 predicate(!VM_Version::supports_cmov() ); | |
7933 match(Set dst (CMoveI (Binary cop cr) (Binary dst src))); | |
7934 ins_cost(200); | |
7935 format %{ "J$cop,us skip\t# unsigned cmove\n\t" | |
7936 "MOV $dst,$src\n" | |
7937 "skip:" %} | |
7938 ins_encode %{ | |
7939 Label Lskip; | |
7940 // Invert sense of branch from sense of CMOV | |
7941 __ jccb((Assembler::Condition)($cop$$cmpcode^1), Lskip); | |
7942 __ movl($dst$$Register, $src$$Register); | |
7943 __ bind(Lskip); | |
7944 %} | |
7945 ins_pipe( pipe_cmov_reg ); | |
7946 %} | |
7947 | |
7908 instruct cmovI_reg(eRegI dst, eRegI src, eFlagsReg cr, cmpOp cop ) %{ | 7948 instruct cmovI_reg(eRegI dst, eRegI src, eFlagsReg cr, cmpOp cop ) %{ |
7909 predicate(VM_Version::supports_cmov() ); | 7949 predicate(VM_Version::supports_cmov() ); |
7910 match(Set dst (CMoveI (Binary cop cr) (Binary dst src))); | 7950 match(Set dst (CMoveI (Binary cop cr) (Binary dst src))); |
7911 ins_cost(200); | 7951 ins_cost(200); |
7912 format %{ "CMOV$cop $dst,$src" %} | 7952 format %{ "CMOV$cop $dst,$src" %} |