comparison src/cpu/x86/vm/x86.ad @ 6725:da91efe96a93

6964458: Reimplement class meta-data storage to use native memory Summary: Remove PermGen, allocate meta-data in metaspace linked to class loaders, rewrite GC walking, rewrite and rename metadata to be C++ classes Reviewed-by: jmasa, stefank, never, coleenp, kvn, brutisso, mgerdin, dholmes, jrose, twisti, roland Contributed-by: jmasa <jon.masamitsu@oracle.com>, stefank <stefan.karlsson@oracle.com>, mgerdin <mikael.gerdin@oracle.com>, never <tom.rodriguez@oracle.com>
author coleenp
date Sat, 01 Sep 2012 13:25:18 -0400
parents 006050192a5a
children 137868b7aa6f
comparison
equal deleted inserted replaced
6724:36d1d483d5d6 6725:da91efe96a93
486 static address float_signflip() { return (address)float_signflip_pool; } 486 static address float_signflip() { return (address)float_signflip_pool; }
487 static address double_signmask() { return (address)double_signmask_pool; } 487 static address double_signmask() { return (address)double_signmask_pool; }
488 static address double_signflip() { return (address)double_signflip_pool; } 488 static address double_signflip() { return (address)double_signflip_pool; }
489 #endif 489 #endif
490 490
491 // Map Types to machine register types
492 const int Matcher::base2reg[Type::lastype] = {
493 Node::NotAMachineReg,0,0, Op_RegI, Op_RegL, 0, Op_RegN,
494 Node::NotAMachineReg, Node::NotAMachineReg, /* tuple, array */
495 Op_VecS, Op_VecD, Op_VecX, Op_VecY, /* Vectors */
496 Op_RegP, Op_RegP, Op_RegP, Op_RegP, Op_RegP, Op_RegP, /* the pointers */
497 0, 0/*abio*/,
498 Op_RegP /* Return address */, 0, /* the memories */
499 Op_RegF, Op_RegF, Op_RegF, Op_RegD, Op_RegD, Op_RegD,
500 0 /*bottom*/
501 };
502 491
503 const bool Matcher::match_rule_supported(int opcode) { 492 const bool Matcher::match_rule_supported(int opcode) {
504 if (!has_match_rule(opcode)) 493 if (!has_match_rule(opcode))
505 return false; 494 return false;
506 495