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comparison src/cpu/x86/vm/c1_Runtime1_x86.cpp @ 304:dc7f315e41f7

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5108146: Merge i486 and amd64 cpu directories 6459804: Want client (c1) compiler for x86_64 (amd64) for faster start-up Reviewed-by: kvn
author never
date Wed, 27 Aug 2008 00:21:55 -0700
parents a61af66fc99e
children 9ee9cf798b59 f8199438385b
comparison
equal deleted inserted replaced
303:fa4d1d240383 304:dc7f315e41f7
28 28
29 // Implementation of StubAssembler 29 // Implementation of StubAssembler
30 30
31 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, int args_size) { 31 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, int args_size) {
32 // setup registers 32 // setup registers
33 const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions) 33 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions)
34 assert(!(oop_result1->is_valid() || oop_result2->is_valid()) || oop_result1 != oop_result2, "registers must be different"); 34 assert(!(oop_result1->is_valid() || oop_result2->is_valid()) || oop_result1 != oop_result2, "registers must be different");
35 assert(oop_result1 != thread && oop_result2 != thread, "registers must be different"); 35 assert(oop_result1 != thread && oop_result2 != thread, "registers must be different");
36 assert(args_size >= 0, "illegal args_size"); 36 assert(args_size >= 0, "illegal args_size");
37 37
38 #ifdef _LP64
39 mov(c_rarg0, thread);
40 set_num_rt_args(0); // Nothing on stack
41 #else
38 set_num_rt_args(1 + args_size); 42 set_num_rt_args(1 + args_size);
39 43
40 // push java thread (becomes first argument of C function) 44 // push java thread (becomes first argument of C function)
41 get_thread(thread); 45 get_thread(thread);
42 pushl(thread); 46 push(thread);
47 #endif // _LP64
43 48
44 set_last_Java_frame(thread, noreg, rbp, NULL); 49 set_last_Java_frame(thread, noreg, rbp, NULL);
50
45 // do the call 51 // do the call
46 call(RuntimeAddress(entry)); 52 call(RuntimeAddress(entry));
47 int call_offset = offset(); 53 int call_offset = offset();
48 // verify callee-saved register 54 // verify callee-saved register
49 #ifdef ASSERT 55 #ifdef ASSERT
50 guarantee(thread != rax, "change this code"); 56 guarantee(thread != rax, "change this code");
51 pushl(rax); 57 push(rax);
52 { Label L; 58 { Label L;
53 get_thread(rax); 59 get_thread(rax);
54 cmpl(thread, rax); 60 cmpptr(thread, rax);
55 jcc(Assembler::equal, L); 61 jcc(Assembler::equal, L);
56 int3(); 62 int3();
57 stop("StubAssembler::call_RT: rdi not callee saved?"); 63 stop("StubAssembler::call_RT: rdi not callee saved?");
58 bind(L); 64 bind(L);
59 } 65 }
60 popl(rax); 66 pop(rax);
61 #endif 67 #endif
62 reset_last_Java_frame(thread, true, false); 68 reset_last_Java_frame(thread, true, false);
63 69
64 // discard thread and arguments 70 // discard thread and arguments
65 addl(rsp, (1 + args_size)*BytesPerWord); 71 NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord));
66 72
67 // check for pending exceptions 73 // check for pending exceptions
68 { Label L; 74 { Label L;
69 cmpl(Address(thread, Thread::pending_exception_offset()), NULL_WORD); 75 cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
70 jcc(Assembler::equal, L); 76 jcc(Assembler::equal, L);
71 // exception pending => remove activation and forward to exception handler 77 // exception pending => remove activation and forward to exception handler
72 movl(rax, Address(thread, Thread::pending_exception_offset())); 78 movptr(rax, Address(thread, Thread::pending_exception_offset()));
73 // make sure that the vm_results are cleared 79 // make sure that the vm_results are cleared
74 if (oop_result1->is_valid()) { 80 if (oop_result1->is_valid()) {
75 movl(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); 81 movptr(Address(thread, JavaThread::vm_result_offset()), (int32_t)NULL_WORD);
76 } 82 }
77 if (oop_result2->is_valid()) { 83 if (oop_result2->is_valid()) {
78 movl(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); 84 movptr(Address(thread, JavaThread::vm_result_2_offset()), (int32_t)NULL_WORD);
79 } 85 }
80 if (frame_size() == no_frame_size) { 86 if (frame_size() == no_frame_size) {
81 leave(); 87 leave();
82 jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 88 jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
83 } else if (_stub_id == Runtime1::forward_exception_id) { 89 } else if (_stub_id == Runtime1::forward_exception_id) {
87 } 93 }
88 bind(L); 94 bind(L);
89 } 95 }
90 // get oop results if there are any and reset the values in the thread 96 // get oop results if there are any and reset the values in the thread
91 if (oop_result1->is_valid()) { 97 if (oop_result1->is_valid()) {
92 movl(oop_result1, Address(thread, JavaThread::vm_result_offset())); 98 movptr(oop_result1, Address(thread, JavaThread::vm_result_offset()));
93 movl(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); 99 movptr(Address(thread, JavaThread::vm_result_offset()), (int32_t)NULL_WORD);
94 verify_oop(oop_result1); 100 verify_oop(oop_result1);
95 } 101 }
96 if (oop_result2->is_valid()) { 102 if (oop_result2->is_valid()) {
97 movl(oop_result2, Address(thread, JavaThread::vm_result_2_offset())); 103 movptr(oop_result2, Address(thread, JavaThread::vm_result_2_offset()));
98 movl(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); 104 movptr(Address(thread, JavaThread::vm_result_2_offset()), (int32_t)NULL_WORD);
99 verify_oop(oop_result2); 105 verify_oop(oop_result2);
100 } 106 }
101 return call_offset; 107 return call_offset;
102 } 108 }
103 109
104 110
105 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) { 111 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) {
106 pushl(arg1); 112 #ifdef _LP64
113 mov(c_rarg1, arg1);
114 #else
115 push(arg1);
116 #endif // _LP64
107 return call_RT(oop_result1, oop_result2, entry, 1); 117 return call_RT(oop_result1, oop_result2, entry, 1);
108 } 118 }
109 119
110 120
111 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) { 121 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) {
112 pushl(arg2); 122 #ifdef _LP64
113 pushl(arg1); 123 if (c_rarg1 == arg2) {
124 if (c_rarg2 == arg1) {
125 xchgq(arg1, arg2);
126 } else {
127 mov(c_rarg2, arg2);
128 mov(c_rarg1, arg1);
129 }
130 } else {
131 mov(c_rarg1, arg1);
132 mov(c_rarg2, arg2);
133 }
134 #else
135 push(arg2);
136 push(arg1);
137 #endif // _LP64
114 return call_RT(oop_result1, oop_result2, entry, 2); 138 return call_RT(oop_result1, oop_result2, entry, 2);
115 } 139 }
116 140
117 141
118 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) { 142 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) {
119 pushl(arg3); 143 #ifdef _LP64
120 pushl(arg2); 144 // if there is any conflict use the stack
121 pushl(arg1); 145 if (arg1 == c_rarg2 || arg1 == c_rarg3 ||
146 arg2 == c_rarg1 || arg1 == c_rarg3 ||
147 arg3 == c_rarg1 || arg1 == c_rarg2) {
148 push(arg3);
149 push(arg2);
150 push(arg1);
151 pop(c_rarg1);
152 pop(c_rarg2);
153 pop(c_rarg3);
154 } else {
155 mov(c_rarg1, arg1);
156 mov(c_rarg2, arg2);
157 mov(c_rarg3, arg3);
158 }
159 #else
160 push(arg3);
161 push(arg2);
162 push(arg1);
163 #endif // _LP64
122 return call_RT(oop_result1, oop_result2, entry, 3); 164 return call_RT(oop_result1, oop_result2, entry, 3);
123 } 165 }
124 166
125 167
126 // Implementation of StubFrame 168 // Implementation of StubFrame
152 // + 1: return address 194 // + 1: return address
153 // + 2: argument with offset 0 195 // + 2: argument with offset 0
154 // + 3: argument with offset 1 196 // + 3: argument with offset 1
155 // + 4: ... 197 // + 4: ...
156 198
157 __ movl(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord)); 199 __ movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord));
158 } 200 }
159 201
160 202
161 StubFrame::~StubFrame() { 203 StubFrame::~StubFrame() {
162 __ leave(); 204 __ leave();
168 210
169 // Implementation of Runtime1 211 // Implementation of Runtime1
170 212
171 #define __ sasm-> 213 #define __ sasm->
172 214
173 const int float_regs_as_doubles_size_in_words = 16; 215 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2;
174 const int xmm_regs_as_doubles_size_in_words = 16; 216 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2;
175 217
176 // Stack layout for saving/restoring all the registers needed during a runtime 218 // Stack layout for saving/restoring all the registers needed during a runtime
177 // call (this includes deoptimization) 219 // call (this includes deoptimization)
178 // Note: note that users of this frame may well have arguments to some runtime 220 // Note: note that users of this frame may well have arguments to some runtime
179 // while these values are on the stack. These positions neglect those arguments 221 // while these values are on the stack. These positions neglect those arguments
180 // but the code in save_live_registers will take the argument count into 222 // but the code in save_live_registers will take the argument count into
181 // account. 223 // account.
182 // 224 //
225 #ifdef _LP64
226 #define SLOT2(x) x,
227 #define SLOT_PER_WORD 2
228 #else
229 #define SLOT2(x)
230 #define SLOT_PER_WORD 1
231 #endif // _LP64
232
183 enum reg_save_layout { 233 enum reg_save_layout {
184 dummy1, 234 // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that
185 dummy2, 235 // happen and will assert if the stack size we create is misaligned
236 #ifdef _LP64
237 align_dummy_0, align_dummy_1,
238 #endif // _LP64
239 dummy1, SLOT2(dummy1H) // 0, 4
240 dummy2, SLOT2(dummy2H) // 8, 12
186 // Two temps to be used as needed by users of save/restore callee registers 241 // Two temps to be used as needed by users of save/restore callee registers
187 temp_2_off, 242 temp_2_off, SLOT2(temp_2H_off) // 16, 20
188 temp_1_off, 243 temp_1_off, SLOT2(temp_1H_off) // 24, 28
189 xmm_regs_as_doubles_off, 244 xmm_regs_as_doubles_off, // 32
190 float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_words, 245 float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160
191 fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_words, 246 fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224
192 fpu_state_end_off = fpu_state_off + FPUStateSizeInWords, 247 // fpu_state_end_off is exclusive
193 marker = fpu_state_end_off, 248 fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352
194 extra_space_offset, 249 marker = fpu_state_end_off, SLOT2(markerH) // 352, 356
250 extra_space_offset, // 360
251 #ifdef _LP64
252 r15_off = extra_space_offset, r15H_off, // 360, 364
253 r14_off, r14H_off, // 368, 372
254 r13_off, r13H_off, // 376, 380
255 r12_off, r12H_off, // 384, 388
256 r11_off, r11H_off, // 392, 396
257 r10_off, r10H_off, // 400, 404
258 r9_off, r9H_off, // 408, 412
259 r8_off, r8H_off, // 416, 420
260 rdi_off, rdiH_off, // 424, 428
261 #else
195 rdi_off = extra_space_offset, 262 rdi_off = extra_space_offset,
196 rsi_off, 263 #endif // _LP64
197 rbp_off, 264 rsi_off, SLOT2(rsiH_off) // 432, 436
198 rsp_off, 265 rbp_off, SLOT2(rbpH_off) // 440, 444
199 rbx_off, 266 rsp_off, SLOT2(rspH_off) // 448, 452
200 rdx_off, 267 rbx_off, SLOT2(rbxH_off) // 456, 460
201 rcx_off, 268 rdx_off, SLOT2(rdxH_off) // 464, 468
202 rax_off, 269 rcx_off, SLOT2(rcxH_off) // 472, 476
203 saved_rbp_off, 270 rax_off, SLOT2(raxH_off) // 480, 484
204 return_off, 271 saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492
205 reg_save_frame_size, // As noted: neglects any parameters to runtime 272 return_off, SLOT2(returnH_off) // 496, 500
273 reg_save_frame_size, // As noted: neglects any parameters to runtime // 504
274
275 #ifdef _WIN64
276 c_rarg0_off = rcx_off,
277 #else
278 c_rarg0_off = rdi_off,
279 #endif // WIN64
206 280
207 // equates 281 // equates
208 282
209 // illegal instruction handler 283 // illegal instruction handler
210 continue_dest_off = temp_1_off, 284 continue_dest_off = temp_1_off,
227 // describe FPU registers. In all other cases it should be sufficient 301 // describe FPU registers. In all other cases it should be sufficient
228 // to simply save their current value. 302 // to simply save their current value.
229 303
230 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args, 304 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
231 bool save_fpu_registers = true) { 305 bool save_fpu_registers = true) {
232 int frame_size = reg_save_frame_size + num_rt_args; // args + thread 306
233 sasm->set_frame_size(frame_size); 307 // In 64bit all the args are in regs so there are no additional stack slots
308 LP64_ONLY(num_rt_args = 0);
309 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
310 int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread
311 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word );
234 312
235 // record saved value locations in an OopMap 313 // record saved value locations in an OopMap
236 // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread 314 // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread
237 OopMap* map = new OopMap(frame_size, 0); 315 OopMap* map = new OopMap(frame_size_in_slots, 0);
238 map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg()); 316 map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg());
239 map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg()); 317 map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg());
240 map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg()); 318 map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg());
241 map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg()); 319 map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg());
242 map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg()); 320 map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg());
243 map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg()); 321 map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg());
322 #ifdef _LP64
323 map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg());
324 map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg());
325 map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg());
326 map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg());
327 map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg());
328 map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg());
329 map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg());
330 map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg());
331
332 // This is stupid but needed.
333 map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next());
334 map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next());
335 map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next());
336 map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next());
337 map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next());
338 map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next());
339
340 map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next());
341 map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next());
342 map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next());
343 map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next());
344 map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next());
345 map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next());
346 map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next());
347 map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next());
348 #endif // _LP64
244 349
245 if (save_fpu_registers) { 350 if (save_fpu_registers) {
246 if (UseSSE < 2) { 351 if (UseSSE < 2) {
247 int fpu_off = float_regs_as_doubles_off; 352 int fpu_off = float_regs_as_doubles_off;
248 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) { 353 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
286 391
287 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args, 392 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
288 bool save_fpu_registers = true) { 393 bool save_fpu_registers = true) {
289 __ block_comment("save_live_registers"); 394 __ block_comment("save_live_registers");
290 395
291 int frame_size = reg_save_frame_size + num_rt_args; // args + thread 396 // 64bit passes the args in regs to the c++ runtime
397 int frame_size_in_slots = reg_save_frame_size NOT_LP64(+ num_rt_args); // args + thread
292 // frame_size = round_to(frame_size, 4); 398 // frame_size = round_to(frame_size, 4);
293 sasm->set_frame_size(frame_size); 399 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word );
294 400
295 __ pushad(); // integer registers 401 __ pusha(); // integer registers
296 402
297 // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset"); 403 // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset");
298 // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset"); 404 // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset");
299 405
300 __ subl(rsp, extra_space_offset * wordSize); 406 __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
301 407
302 #ifdef ASSERT 408 #ifdef ASSERT
303 __ movl(Address(rsp, marker * wordSize), 0xfeedbeef); 409 __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
304 #endif 410 #endif
305 411
306 if (save_fpu_registers) { 412 if (save_fpu_registers) {
307 if (UseSSE < 2) { 413 if (UseSSE < 2) {
308 // save FPU stack 414 // save FPU stack
309 __ fnsave(Address(rsp, fpu_state_off * wordSize)); 415 __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
310 __ fwait(); 416 __ fwait();
311 417
312 #ifdef ASSERT 418 #ifdef ASSERT
313 Label ok; 419 Label ok;
314 __ cmpw(Address(rsp, fpu_state_off * wordSize), StubRoutines::fpu_cntrl_wrd_std()); 420 __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
315 __ jccb(Assembler::equal, ok); 421 __ jccb(Assembler::equal, ok);
316 __ stop("corrupted control word detected"); 422 __ stop("corrupted control word detected");
317 __ bind(ok); 423 __ bind(ok);
318 #endif 424 #endif
319 425
320 // Reset the control word to guard against exceptions being unmasked 426 // Reset the control word to guard against exceptions being unmasked
321 // since fstp_d can cause FPU stack underflow exceptions. Write it 427 // since fstp_d can cause FPU stack underflow exceptions. Write it
322 // into the on stack copy and then reload that to make sure that the 428 // into the on stack copy and then reload that to make sure that the
323 // current and future values are correct. 429 // current and future values are correct.
324 __ movw(Address(rsp, fpu_state_off * wordSize), StubRoutines::fpu_cntrl_wrd_std()); 430 __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
325 __ frstor(Address(rsp, fpu_state_off * wordSize)); 431 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
326 432
327 // Save the FPU registers in de-opt-able form 433 // Save the FPU registers in de-opt-able form
328 __ fstp_d(Address(rsp, float_regs_as_doubles_off * BytesPerWord + 0)); 434 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0));
329 __ fstp_d(Address(rsp, float_regs_as_doubles_off * BytesPerWord + 8)); 435 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8));
330 __ fstp_d(Address(rsp, float_regs_as_doubles_off * BytesPerWord + 16)); 436 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16));
331 __ fstp_d(Address(rsp, float_regs_as_doubles_off * BytesPerWord + 24)); 437 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24));
332 __ fstp_d(Address(rsp, float_regs_as_doubles_off * BytesPerWord + 32)); 438 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32));
333 __ fstp_d(Address(rsp, float_regs_as_doubles_off * BytesPerWord + 40)); 439 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40));
334 __ fstp_d(Address(rsp, float_regs_as_doubles_off * BytesPerWord + 48)); 440 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48));
335 __ fstp_d(Address(rsp, float_regs_as_doubles_off * BytesPerWord + 56)); 441 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56));
336 } 442 }
337 443
338 if (UseSSE >= 2) { 444 if (UseSSE >= 2) {
339 // save XMM registers 445 // save XMM registers
340 // XMM registers can contain float or double values, but this is not known here, 446 // XMM registers can contain float or double values, but this is not known here,
341 // so always save them as doubles. 447 // so always save them as doubles.
342 // note that float values are _not_ converted automatically, so for float values 448 // note that float values are _not_ converted automatically, so for float values
343 // the second word contains only garbage data. 449 // the second word contains only garbage data.
344 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * wordSize + 0), xmm0); 450 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0);
345 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * wordSize + 8), xmm1); 451 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1);
346 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * wordSize + 16), xmm2); 452 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2);
347 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * wordSize + 24), xmm3); 453 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3);
348 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * wordSize + 32), xmm4); 454 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4);
349 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * wordSize + 40), xmm5); 455 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5);
350 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * wordSize + 48), xmm6); 456 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6);
351 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * wordSize + 56), xmm7); 457 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7);
458 #ifdef _LP64
459 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64), xmm8);
460 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72), xmm9);
461 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80), xmm10);
462 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88), xmm11);
463 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96), xmm12);
464 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104), xmm13);
465 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112), xmm14);
466 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120), xmm15);
467 #endif // _LP64
352 } else if (UseSSE == 1) { 468 } else if (UseSSE == 1) {
353 // save XMM registers as float because double not supported without SSE2 469 // save XMM registers as float because double not supported without SSE2
354 __ movflt(Address(rsp, xmm_regs_as_doubles_off * wordSize + 0), xmm0); 470 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0);
355 __ movflt(Address(rsp, xmm_regs_as_doubles_off * wordSize + 8), xmm1); 471 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1);
356 __ movflt(Address(rsp, xmm_regs_as_doubles_off * wordSize + 16), xmm2); 472 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2);
357 __ movflt(Address(rsp, xmm_regs_as_doubles_off * wordSize + 24), xmm3); 473 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3);
358 __ movflt(Address(rsp, xmm_regs_as_doubles_off * wordSize + 32), xmm4); 474 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4);
359 __ movflt(Address(rsp, xmm_regs_as_doubles_off * wordSize + 40), xmm5); 475 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5);
360 __ movflt(Address(rsp, xmm_regs_as_doubles_off * wordSize + 48), xmm6); 476 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6);
361 __ movflt(Address(rsp, xmm_regs_as_doubles_off * wordSize + 56), xmm7); 477 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7);
362 } 478 }
363 } 479 }
364 480
365 // FPU stack must be empty now 481 // FPU stack must be empty now
366 __ verify_FPU(0, "save_live_registers"); 482 __ verify_FPU(0, "save_live_registers");
371 487
372 static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) { 488 static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) {
373 if (restore_fpu_registers) { 489 if (restore_fpu_registers) {
374 if (UseSSE >= 2) { 490 if (UseSSE >= 2) {
375 // restore XMM registers 491 // restore XMM registers
376 __ movdbl(xmm0, Address(rsp, xmm_regs_as_doubles_off * wordSize + 0)); 492 __ movdbl(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0));
377 __ movdbl(xmm1, Address(rsp, xmm_regs_as_doubles_off * wordSize + 8)); 493 __ movdbl(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8));
378 __ movdbl(xmm2, Address(rsp, xmm_regs_as_doubles_off * wordSize + 16)); 494 __ movdbl(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16));
379 __ movdbl(xmm3, Address(rsp, xmm_regs_as_doubles_off * wordSize + 24)); 495 __ movdbl(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24));
380 __ movdbl(xmm4, Address(rsp, xmm_regs_as_doubles_off * wordSize + 32)); 496 __ movdbl(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32));
381 __ movdbl(xmm5, Address(rsp, xmm_regs_as_doubles_off * wordSize + 40)); 497 __ movdbl(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40));
382 __ movdbl(xmm6, Address(rsp, xmm_regs_as_doubles_off * wordSize + 48)); 498 __ movdbl(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48));
383 __ movdbl(xmm7, Address(rsp, xmm_regs_as_doubles_off * wordSize + 56)); 499 __ movdbl(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56));
500 #ifdef _LP64
501 __ movdbl(xmm8, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64));
502 __ movdbl(xmm9, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72));
503 __ movdbl(xmm10, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80));
504 __ movdbl(xmm11, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88));
505 __ movdbl(xmm12, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96));
506 __ movdbl(xmm13, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104));
507 __ movdbl(xmm14, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112));
508 __ movdbl(xmm15, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120));
509 #endif // _LP64
384 } else if (UseSSE == 1) { 510 } else if (UseSSE == 1) {
385 // restore XMM registers 511 // restore XMM registers
386 __ movflt(xmm0, Address(rsp, xmm_regs_as_doubles_off * wordSize + 0)); 512 __ movflt(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0));
387 __ movflt(xmm1, Address(rsp, xmm_regs_as_doubles_off * wordSize + 8)); 513 __ movflt(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8));
388 __ movflt(xmm2, Address(rsp, xmm_regs_as_doubles_off * wordSize + 16)); 514 __ movflt(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16));
389 __ movflt(xmm3, Address(rsp, xmm_regs_as_doubles_off * wordSize + 24)); 515 __ movflt(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24));
390 __ movflt(xmm4, Address(rsp, xmm_regs_as_doubles_off * wordSize + 32)); 516 __ movflt(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32));
391 __ movflt(xmm5, Address(rsp, xmm_regs_as_doubles_off * wordSize + 40)); 517 __ movflt(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40));
392 __ movflt(xmm6, Address(rsp, xmm_regs_as_doubles_off * wordSize + 48)); 518 __ movflt(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48));
393 __ movflt(xmm7, Address(rsp, xmm_regs_as_doubles_off * wordSize + 56)); 519 __ movflt(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56));
394 } 520 }
395 521
396 if (UseSSE < 2) { 522 if (UseSSE < 2) {
397 __ frstor(Address(rsp, fpu_state_off * wordSize)); 523 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
398 } else { 524 } else {
399 // check that FPU stack is really empty 525 // check that FPU stack is really empty
400 __ verify_FPU(0, "restore_live_registers"); 526 __ verify_FPU(0, "restore_live_registers");
401 } 527 }
402 528
406 } 532 }
407 533
408 #ifdef ASSERT 534 #ifdef ASSERT
409 { 535 {
410 Label ok; 536 Label ok;
411 __ cmpl(Address(rsp, marker * wordSize), 0xfeedbeef); 537 __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
412 __ jcc(Assembler::equal, ok); 538 __ jcc(Assembler::equal, ok);
413 __ stop("bad offsets in frame"); 539 __ stop("bad offsets in frame");
414 __ bind(ok); 540 __ bind(ok);
415 } 541 }
416 #endif 542 #endif // ASSERT
417 543
418 __ addl(rsp, extra_space_offset * wordSize); 544 __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
419 } 545 }
420 546
421 547
422 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) { 548 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
423 __ block_comment("restore_live_registers"); 549 __ block_comment("restore_live_registers");
424 550
425 restore_fpu(sasm, restore_fpu_registers); 551 restore_fpu(sasm, restore_fpu_registers);
426 __ popad(); 552 __ popa();
427 } 553 }
428 554
429 555
430 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) { 556 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) {
431 __ block_comment("restore_live_registers_except_rax"); 557 __ block_comment("restore_live_registers_except_rax");
432 558
433 restore_fpu(sasm, restore_fpu_registers); 559 restore_fpu(sasm, restore_fpu_registers);
434 560
435 __ popl(rdi); 561 #ifdef _LP64
436 __ popl(rsi); 562 __ movptr(r15, Address(rsp, 0));
437 __ popl(rbp); 563 __ movptr(r14, Address(rsp, wordSize));
438 __ popl(rbx); // skip this value 564 __ movptr(r13, Address(rsp, 2 * wordSize));
439 __ popl(rbx); 565 __ movptr(r12, Address(rsp, 3 * wordSize));
440 __ popl(rdx); 566 __ movptr(r11, Address(rsp, 4 * wordSize));
441 __ popl(rcx); 567 __ movptr(r10, Address(rsp, 5 * wordSize));
442 __ addl(rsp, 4); 568 __ movptr(r9, Address(rsp, 6 * wordSize));
569 __ movptr(r8, Address(rsp, 7 * wordSize));
570 __ movptr(rdi, Address(rsp, 8 * wordSize));
571 __ movptr(rsi, Address(rsp, 9 * wordSize));
572 __ movptr(rbp, Address(rsp, 10 * wordSize));
573 // skip rsp
574 __ movptr(rbx, Address(rsp, 12 * wordSize));
575 __ movptr(rdx, Address(rsp, 13 * wordSize));
576 __ movptr(rcx, Address(rsp, 14 * wordSize));
577
578 __ addptr(rsp, 16 * wordSize);
579 #else
580
581 __ pop(rdi);
582 __ pop(rsi);
583 __ pop(rbp);
584 __ pop(rbx); // skip this value
585 __ pop(rbx);
586 __ pop(rdx);
587 __ pop(rcx);
588 __ addptr(rsp, BytesPerWord);
589 #endif // _LP64
443 } 590 }
444 591
445 592
446 void Runtime1::initialize_pd() { 593 void Runtime1::initialize_pd() {
447 // nothing to do 594 // nothing to do
463 // registers used by this stub 610 // registers used by this stub
464 const Register temp_reg = rbx; 611 const Register temp_reg = rbx;
465 612
466 // load argument for exception that is passed as an argument into the stub 613 // load argument for exception that is passed as an argument into the stub
467 if (has_argument) { 614 if (has_argument) {
468 __ movl(temp_reg, Address(rbp, 2*BytesPerWord)); 615 #ifdef _LP64
469 __ pushl(temp_reg); 616 __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord));
617 #else
618 __ movptr(temp_reg, Address(rbp, 2*BytesPerWord));
619 __ push(temp_reg);
620 #endif // _LP64
470 } 621 }
471
472 int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1); 622 int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1);
473 623
474 OopMapSet* oop_maps = new OopMapSet(); 624 OopMapSet* oop_maps = new OopMapSet();
475 oop_maps->add_gc_map(call_offset, oop_map); 625 oop_maps->add_gc_map(call_offset, oop_map);
476 626
484 // incoming parameters 634 // incoming parameters
485 const Register exception_oop = rax; 635 const Register exception_oop = rax;
486 const Register exception_pc = rdx; 636 const Register exception_pc = rdx;
487 // other registers used in this stub 637 // other registers used in this stub
488 const Register real_return_addr = rbx; 638 const Register real_return_addr = rbx;
489 const Register thread = rdi; 639 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
490 640
491 __ block_comment("generate_handle_exception"); 641 __ block_comment("generate_handle_exception");
492 642
493 #ifdef TIERED 643 #ifdef TIERED
494 // C2 can leave the fpu stack dirty 644 // C2 can leave the fpu stack dirty
501 __ invalidate_registers(false, true, true, false, true, true); 651 __ invalidate_registers(false, true, true, false, true, true);
502 // verify that rax, contains a valid exception 652 // verify that rax, contains a valid exception
503 __ verify_not_null_oop(exception_oop); 653 __ verify_not_null_oop(exception_oop);
504 654
505 // load address of JavaThread object for thread-local data 655 // load address of JavaThread object for thread-local data
506 __ get_thread(thread); 656 NOT_LP64(__ get_thread(thread);)
507 657
508 #ifdef ASSERT 658 #ifdef ASSERT
509 // check that fields in JavaThread for exception oop and issuing pc are 659 // check that fields in JavaThread for exception oop and issuing pc are
510 // empty before writing to them 660 // empty before writing to them
511 Label oop_empty; 661 Label oop_empty;
512 __ cmpl(Address(thread, JavaThread::exception_oop_offset()), 0); 662 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD);
513 __ jcc(Assembler::equal, oop_empty); 663 __ jcc(Assembler::equal, oop_empty);
514 __ stop("exception oop already set"); 664 __ stop("exception oop already set");
515 __ bind(oop_empty); 665 __ bind(oop_empty);
516 666
517 Label pc_empty; 667 Label pc_empty;
518 __ cmpl(Address(thread, JavaThread::exception_pc_offset()), 0); 668 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
519 __ jcc(Assembler::equal, pc_empty); 669 __ jcc(Assembler::equal, pc_empty);
520 __ stop("exception pc already set"); 670 __ stop("exception pc already set");
521 __ bind(pc_empty); 671 __ bind(pc_empty);
522 #endif 672 #endif
523 673
524 // save exception oop and issuing pc into JavaThread 674 // save exception oop and issuing pc into JavaThread
525 // (exception handler will load it from here) 675 // (exception handler will load it from here)
526 __ movl(Address(thread, JavaThread::exception_oop_offset()), exception_oop); 676 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop);
527 __ movl(Address(thread, JavaThread::exception_pc_offset()), exception_pc); 677 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc);
528 678
529 // save real return address (pc that called this stub) 679 // save real return address (pc that called this stub)
530 __ movl(real_return_addr, Address(rbp, 1*BytesPerWord)); 680 __ movptr(real_return_addr, Address(rbp, 1*BytesPerWord));
531 __ movl(Address(rsp, temp_1_off * BytesPerWord), real_return_addr); 681 __ movptr(Address(rsp, temp_1_off * VMRegImpl::stack_slot_size), real_return_addr);
532 682
533 // patch throwing pc into return address (has bci & oop map) 683 // patch throwing pc into return address (has bci & oop map)
534 __ movl(Address(rbp, 1*BytesPerWord), exception_pc); 684 __ movptr(Address(rbp, 1*BytesPerWord), exception_pc);
535 685
536 // compute the exception handler. 686 // compute the exception handler.
537 // the exception oop and the throwing pc are read from the fields in JavaThread 687 // the exception oop and the throwing pc are read from the fields in JavaThread
538 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc)); 688 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
539 oop_maps->add_gc_map(call_offset, oop_map); 689 oop_maps->add_gc_map(call_offset, oop_map);
546 __ invalidate_registers(false, true, true, true, true, true); 696 __ invalidate_registers(false, true, true, true, true, true);
547 697
548 // Do we have an exception handler in the nmethod? 698 // Do we have an exception handler in the nmethod?
549 Label no_handler; 699 Label no_handler;
550 Label done; 700 Label done;
551 __ testl(rax, rax); 701 __ testptr(rax, rax);
552 __ jcc(Assembler::zero, no_handler); 702 __ jcc(Assembler::zero, no_handler);
553 703
554 // exception handler found 704 // exception handler found
555 // patch the return address -> the stub will directly return to the exception handler 705 // patch the return address -> the stub will directly return to the exception handler
556 __ movl(Address(rbp, 1*BytesPerWord), rax); 706 __ movptr(Address(rbp, 1*BytesPerWord), rax);
557 707
558 // restore registers 708 // restore registers
559 restore_live_registers(sasm, save_fpu_registers); 709 restore_live_registers(sasm, save_fpu_registers);
560 710
561 // return to exception handler 711 // return to exception handler
566 // no exception handler found in this method, so the exception is 716 // no exception handler found in this method, so the exception is
567 // forwarded to the caller (using the unwind code of the nmethod) 717 // forwarded to the caller (using the unwind code of the nmethod)
568 // there is no need to restore the registers 718 // there is no need to restore the registers
569 719
570 // restore the real return address that was saved before the RT-call 720 // restore the real return address that was saved before the RT-call
571 __ movl(real_return_addr, Address(rsp, temp_1_off * BytesPerWord)); 721 __ movptr(real_return_addr, Address(rsp, temp_1_off * VMRegImpl::stack_slot_size));
572 __ movl(Address(rbp, 1*BytesPerWord), real_return_addr); 722 __ movptr(Address(rbp, 1*BytesPerWord), real_return_addr);
573 723
574 // load address of JavaThread object for thread-local data 724 // load address of JavaThread object for thread-local data
575 __ get_thread(thread); 725 NOT_LP64(__ get_thread(thread);)
576 // restore exception oop into rax, (convention for unwind code) 726 // restore exception oop into rax, (convention for unwind code)
577 __ movl(exception_oop, Address(thread, JavaThread::exception_oop_offset())); 727 __ movptr(exception_oop, Address(thread, JavaThread::exception_oop_offset()));
578 728
579 // clear exception fields in JavaThread because they are no longer needed 729 // clear exception fields in JavaThread because they are no longer needed
580 // (fields must be cleared because they are processed by GC otherwise) 730 // (fields must be cleared because they are processed by GC otherwise)
581 __ movl(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD); 731 __ movptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
582 __ movl(Address(thread, JavaThread::exception_pc_offset()), NULL_WORD); 732 __ movptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
583 733
584 // pop the stub frame off 734 // pop the stub frame off
585 __ leave(); 735 __ leave();
586 736
587 generate_unwind_exception(sasm); 737 generate_unwind_exception(sasm);
593 // incoming parameters 743 // incoming parameters
594 const Register exception_oop = rax; 744 const Register exception_oop = rax;
595 // other registers used in this stub 745 // other registers used in this stub
596 const Register exception_pc = rdx; 746 const Register exception_pc = rdx;
597 const Register handler_addr = rbx; 747 const Register handler_addr = rbx;
598 const Register thread = rdi; 748 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
599 749
600 // verify that only rax, is valid at this time 750 // verify that only rax, is valid at this time
601 __ invalidate_registers(false, true, true, true, true, true); 751 __ invalidate_registers(false, true, true, true, true, true);
602 752
603 #ifdef ASSERT 753 #ifdef ASSERT
604 // check that fields in JavaThread for exception oop and issuing pc are empty 754 // check that fields in JavaThread for exception oop and issuing pc are empty
605 __ get_thread(thread); 755 NOT_LP64(__ get_thread(thread);)
606 Label oop_empty; 756 Label oop_empty;
607 __ cmpl(Address(thread, JavaThread::exception_oop_offset()), 0); 757 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0);
608 __ jcc(Assembler::equal, oop_empty); 758 __ jcc(Assembler::equal, oop_empty);
609 __ stop("exception oop must be empty"); 759 __ stop("exception oop must be empty");
610 __ bind(oop_empty); 760 __ bind(oop_empty);
611 761
612 Label pc_empty; 762 Label pc_empty;
613 __ cmpl(Address(thread, JavaThread::exception_pc_offset()), 0); 763 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
614 __ jcc(Assembler::equal, pc_empty); 764 __ jcc(Assembler::equal, pc_empty);
615 __ stop("exception pc must be empty"); 765 __ stop("exception pc must be empty");
616 __ bind(pc_empty); 766 __ bind(pc_empty);
617 #endif 767 #endif
618 768
620 __ empty_FPU_stack(); 770 __ empty_FPU_stack();
621 771
622 // leave activation of nmethod 772 // leave activation of nmethod
623 __ leave(); 773 __ leave();
624 // store return address (is on top of stack after leave) 774 // store return address (is on top of stack after leave)
625 __ movl(exception_pc, Address(rsp, 0)); 775 __ movptr(exception_pc, Address(rsp, 0));
626 776
627 __ verify_oop(exception_oop); 777 __ verify_oop(exception_oop);
628 778
629 // save exception oop from rax, to stack before call 779 // save exception oop from rax, to stack before call
630 __ pushl(exception_oop); 780 __ push(exception_oop);
631 781
632 // search the exception handler address of the caller (using the return address) 782 // search the exception handler address of the caller (using the return address)
633 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), exception_pc); 783 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), exception_pc);
634 // rax,: exception handler address of the caller 784 // rax,: exception handler address of the caller
635 785
636 // only rax, is valid at this time, all other registers have been destroyed by the call 786 // only rax, is valid at this time, all other registers have been destroyed by the call
637 __ invalidate_registers(false, true, true, true, true, true); 787 __ invalidate_registers(false, true, true, true, true, true);
638 788
639 // move result of call into correct register 789 // move result of call into correct register
640 __ movl(handler_addr, rax); 790 __ movptr(handler_addr, rax);
641 791
642 // restore exception oop in rax, (required convention of exception handler) 792 // restore exception oop in rax, (required convention of exception handler)
643 __ popl(exception_oop); 793 __ pop(exception_oop);
644 794
645 __ verify_oop(exception_oop); 795 __ verify_oop(exception_oop);
646 796
647 // get throwing pc (= return address). 797 // get throwing pc (= return address).
648 // rdx has been destroyed by the call, so it must be set again 798 // rdx has been destroyed by the call, so it must be set again
649 // the pop is also necessary to simulate the effect of a ret(0) 799 // the pop is also necessary to simulate the effect of a ret(0)
650 __ popl(exception_pc); 800 __ pop(exception_pc);
651 801
652 // verify that that there is really a valid exception in rax, 802 // verify that that there is really a valid exception in rax,
653 __ verify_not_null_oop(exception_oop); 803 __ verify_not_null_oop(exception_oop);
654 804
655 // continue at exception handler (return address removed) 805 // continue at exception handler (return address removed)
675 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); 825 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
676 assert(deopt_blob != NULL, "deoptimization blob must have been created"); 826 assert(deopt_blob != NULL, "deoptimization blob must have been created");
677 827
678 OopMap* oop_map = save_live_registers(sasm, num_rt_args); 828 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
679 829
680 __ pushl(rax); // push dummy 830 #ifdef _LP64
831 const Register thread = r15_thread;
832 // No need to worry about dummy
833 __ mov(c_rarg0, thread);
834 #else
835 __ push(rax); // push dummy
681 836
682 const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions) 837 const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions)
683 // push java thread (becomes first argument of C function) 838 // push java thread (becomes first argument of C function)
684 __ get_thread(thread); 839 __ get_thread(thread);
685 __ pushl(thread); 840 __ push(thread);
841 #endif // _LP64
686 __ set_last_Java_frame(thread, noreg, rbp, NULL); 842 __ set_last_Java_frame(thread, noreg, rbp, NULL);
687 // do the call 843 // do the call
688 __ call(RuntimeAddress(target)); 844 __ call(RuntimeAddress(target));
689 OopMapSet* oop_maps = new OopMapSet(); 845 OopMapSet* oop_maps = new OopMapSet();
690 oop_maps->add_gc_map(__ offset(), oop_map); 846 oop_maps->add_gc_map(__ offset(), oop_map);
691 // verify callee-saved register 847 // verify callee-saved register
692 #ifdef ASSERT 848 #ifdef ASSERT
693 guarantee(thread != rax, "change this code"); 849 guarantee(thread != rax, "change this code");
694 __ pushl(rax); 850 __ push(rax);
695 { Label L; 851 { Label L;
696 __ get_thread(rax); 852 __ get_thread(rax);
697 __ cmpl(thread, rax); 853 __ cmpptr(thread, rax);
698 __ jcc(Assembler::equal, L); 854 __ jcc(Assembler::equal, L);
699 __ stop("StubAssembler::call_RT: rdi not callee saved?"); 855 __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?");
700 __ bind(L); 856 __ bind(L);
701 } 857 }
702 __ popl(rax); 858 __ pop(rax);
703 #endif 859 #endif
704 __ reset_last_Java_frame(thread, true, false); 860 __ reset_last_Java_frame(thread, true, false);
705 __ popl(rcx); // discard thread arg 861 #ifndef _LP64
706 __ popl(rcx); // discard dummy 862 __ pop(rcx); // discard thread arg
863 __ pop(rcx); // discard dummy
864 #endif // _LP64
707 865
708 // check for pending exceptions 866 // check for pending exceptions
709 { Label L; 867 { Label L;
710 __ cmpl(Address(thread, Thread::pending_exception_offset()), NULL_WORD); 868 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
711 __ jcc(Assembler::equal, L); 869 __ jcc(Assembler::equal, L);
712 // exception pending => remove activation and forward to exception handler 870 // exception pending => remove activation and forward to exception handler
713 871
714 __ testl(rax, rax); // have we deoptimized? 872 __ testptr(rax, rax); // have we deoptimized?
715 __ jump_cc(Assembler::equal, 873 __ jump_cc(Assembler::equal,
716 RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); 874 RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
717 875
718 // the deopt blob expects exceptions in the special fields of 876 // the deopt blob expects exceptions in the special fields of
719 // JavaThread, so copy and clear pending exception. 877 // JavaThread, so copy and clear pending exception.
720 878
721 // load and clear pending exception 879 // load and clear pending exception
722 __ movl(rax, Address(thread, Thread::pending_exception_offset())); 880 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
723 __ movl(Address(thread, Thread::pending_exception_offset()), NULL_WORD); 881 __ movptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
724 882
725 // check that there is really a valid exception 883 // check that there is really a valid exception
726 __ verify_not_null_oop(rax); 884 __ verify_not_null_oop(rax);
727 885
728 // load throwing pc: this is the return address of the stub 886 // load throwing pc: this is the return address of the stub
729 __ movl(rdx, Address(rsp, return_off * BytesPerWord)); 887 __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size));
730 888
731 #ifdef ASSERT 889 #ifdef ASSERT
732 // check that fields in JavaThread for exception oop and issuing pc are empty 890 // check that fields in JavaThread for exception oop and issuing pc are empty
733 Label oop_empty; 891 Label oop_empty;
734 __ cmpoop(Address(thread, JavaThread::exception_oop_offset()), 0); 892 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
735 __ jcc(Assembler::equal, oop_empty); 893 __ jcc(Assembler::equal, oop_empty);
736 __ stop("exception oop must be empty"); 894 __ stop("exception oop must be empty");
737 __ bind(oop_empty); 895 __ bind(oop_empty);
738 896
739 Label pc_empty; 897 Label pc_empty;
740 __ cmpl(Address(thread, JavaThread::exception_pc_offset()), 0); 898 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
741 __ jcc(Assembler::equal, pc_empty); 899 __ jcc(Assembler::equal, pc_empty);
742 __ stop("exception pc must be empty"); 900 __ stop("exception pc must be empty");
743 __ bind(pc_empty); 901 __ bind(pc_empty);
744 #endif 902 #endif
745 903
746 // store exception oop and throwing pc to JavaThread 904 // store exception oop and throwing pc to JavaThread
747 __ movl(Address(thread, JavaThread::exception_oop_offset()), rax); 905 __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax);
748 __ movl(Address(thread, JavaThread::exception_pc_offset()), rdx); 906 __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx);
749 907
750 restore_live_registers(sasm); 908 restore_live_registers(sasm);
751 909
752 __ leave(); 910 __ leave();
753 __ addl(rsp, 4); // remove return address from stack 911 __ addptr(rsp, BytesPerWord); // remove return address from stack
754 912
755 // Forward the exception directly to deopt blob. We can blow no 913 // Forward the exception directly to deopt blob. We can blow no
756 // registers and must leave throwing pc on the stack. A patch may 914 // registers and must leave throwing pc on the stack. A patch may
757 // have values live in registers so the entry point with the 915 // have values live in registers so the entry point with the
758 // exception in tls. 916 // exception in tls.
765 // Runtime will return true if the nmethod has been deoptimized during 923 // Runtime will return true if the nmethod has been deoptimized during
766 // the patching process. In that case we must do a deopt reexecute instead. 924 // the patching process. In that case we must do a deopt reexecute instead.
767 925
768 Label reexecuteEntry, cont; 926 Label reexecuteEntry, cont;
769 927
770 __ testl(rax, rax); // have we deoptimized? 928 __ testptr(rax, rax); // have we deoptimized?
771 __ jcc(Assembler::equal, cont); // no 929 __ jcc(Assembler::equal, cont); // no
772 930
773 // Will reexecute. Proper return address is already on the stack we just restore 931 // Will reexecute. Proper return address is already on the stack we just restore
774 // registers, pop all of our frame but the return address and jump to the deopt blob 932 // registers, pop all of our frame but the return address and jump to the deopt blob
775 restore_live_registers(sasm); 933 restore_live_registers(sasm);
804 // frame. The registers have been saved in the standard 962 // frame. The registers have been saved in the standard
805 // places. Perform an exception lookup in the caller and 963 // places. Perform an exception lookup in the caller and
806 // dispatch to the handler if found. Otherwise unwind and 964 // dispatch to the handler if found. Otherwise unwind and
807 // dispatch to the callers exception handler. 965 // dispatch to the callers exception handler.
808 966
809 const Register thread = rdi; 967 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
810 const Register exception_oop = rax; 968 const Register exception_oop = rax;
811 const Register exception_pc = rdx; 969 const Register exception_pc = rdx;
812 970
813 // load pending exception oop into rax, 971 // load pending exception oop into rax,
814 __ movl(exception_oop, Address(thread, Thread::pending_exception_offset())); 972 __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
815 // clear pending exception 973 // clear pending exception
816 __ movl(Address(thread, Thread::pending_exception_offset()), NULL_WORD); 974 __ movptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
817 975
818 // load issuing PC (the return address for this stub) into rdx 976 // load issuing PC (the return address for this stub) into rdx
819 __ movl(exception_pc, Address(rbp, 1*BytesPerWord)); 977 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord));
820 978
821 // make sure that the vm_results are cleared (may be unnecessary) 979 // make sure that the vm_results are cleared (may be unnecessary)
822 __ movl(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); 980 __ movptr(Address(thread, JavaThread::vm_result_offset()), (int32_t)NULL_WORD);
823 __ movl(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); 981 __ movptr(Address(thread, JavaThread::vm_result_2_offset()), (int32_t)NULL_WORD);
824 982
825 // verify that that there is really a valid exception in rax, 983 // verify that that there is really a valid exception in rax,
826 __ verify_not_null_oop(exception_oop); 984 __ verify_not_null_oop(exception_oop);
827 985
828 986
855 Register obj_size = rcx; 1013 Register obj_size = rcx;
856 Register t1 = rbx; 1014 Register t1 = rbx;
857 Register t2 = rsi; 1015 Register t2 = rsi;
858 assert_different_registers(klass, obj, obj_size, t1, t2); 1016 assert_different_registers(klass, obj, obj_size, t1, t2);
859 1017
860 __ pushl(rdi); 1018 __ push(rdi);
861 __ pushl(rbx); 1019 __ push(rbx);
862 1020
863 if (id == fast_new_instance_init_check_id) { 1021 if (id == fast_new_instance_init_check_id) {
864 // make sure the klass is initialized 1022 // make sure the klass is initialized
865 __ cmpl(Address(klass, instanceKlass::init_state_offset_in_bytes() + sizeof(oopDesc)), instanceKlass::fully_initialized); 1023 __ cmpl(Address(klass, instanceKlass::init_state_offset_in_bytes() + sizeof(oopDesc)), instanceKlass::fully_initialized);
866 __ jcc(Assembler::notEqual, slow_path); 1024 __ jcc(Assembler::notEqual, slow_path);
887 Label retry_tlab, try_eden; 1045 Label retry_tlab, try_eden;
888 __ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy rdx (klass) 1046 __ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy rdx (klass)
889 1047
890 __ bind(retry_tlab); 1048 __ bind(retry_tlab);
891 1049
892 // get the instance size 1050 // get the instance size (size is postive so movl is fine for 64bit)
893 __ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); 1051 __ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes()));
894 __ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path); 1052 __ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path);
895 __ initialize_object(obj, klass, obj_size, 0, t1, t2); 1053 __ initialize_object(obj, klass, obj_size, 0, t1, t2);
896 __ verify_oop(obj); 1054 __ verify_oop(obj);
897 __ popl(rbx); 1055 __ pop(rbx);
898 __ popl(rdi); 1056 __ pop(rdi);
899 __ ret(0); 1057 __ ret(0);
900 1058
901 __ bind(try_eden); 1059 __ bind(try_eden);
902 // get the instance size 1060 // get the instance size (size is postive so movl is fine for 64bit)
903 __ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); 1061 __ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes()));
904 __ eden_allocate(obj, obj_size, 0, t1, slow_path); 1062 __ eden_allocate(obj, obj_size, 0, t1, slow_path);
905 __ initialize_object(obj, klass, obj_size, 0, t1, t2); 1063 __ initialize_object(obj, klass, obj_size, 0, t1, t2);
906 __ verify_oop(obj); 1064 __ verify_oop(obj);
907 __ popl(rbx); 1065 __ pop(rbx);
908 __ popl(rdi); 1066 __ pop(rdi);
909 __ ret(0); 1067 __ ret(0);
910 1068
911 __ bind(slow_path); 1069 __ bind(slow_path);
912 __ popl(rbx); 1070 __ pop(rbx);
913 __ popl(rdi); 1071 __ pop(rdi);
914 } 1072 }
915 1073
916 __ enter(); 1074 __ enter();
917 OopMap* map = save_live_registers(sasm, 2); 1075 OopMap* map = save_live_registers(sasm, 2);
918 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass); 1076 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
994 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves rbx, & rdx 1152 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves rbx, & rdx
995 1153
996 __ bind(retry_tlab); 1154 __ bind(retry_tlab);
997 1155
998 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) 1156 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F))
1157 // since size is postive movl does right thing on 64bit
999 __ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); 1158 __ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes()));
1159 // since size is postive movl does right thing on 64bit
1000 __ movl(arr_size, length); 1160 __ movl(arr_size, length);
1001 assert(t1 == rcx, "fixed register usage"); 1161 assert(t1 == rcx, "fixed register usage");
1002 __ shll(arr_size /* by t1=rcx, mod 32 */); 1162 __ shlptr(arr_size /* by t1=rcx, mod 32 */);
1003 __ shrl(t1, Klass::_lh_header_size_shift); 1163 __ shrptr(t1, Klass::_lh_header_size_shift);
1004 __ andl(t1, Klass::_lh_header_size_mask); 1164 __ andptr(t1, Klass::_lh_header_size_mask);
1005 __ addl(arr_size, t1); 1165 __ addptr(arr_size, t1);
1006 __ addl(arr_size, MinObjAlignmentInBytesMask); // align up 1166 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up
1007 __ andl(arr_size, ~MinObjAlignmentInBytesMask); 1167 __ andptr(arr_size, ~MinObjAlignmentInBytesMask);
1008 1168
1009 __ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size 1169 __ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size
1010 1170
1011 __ initialize_header(obj, klass, length, t1, t2); 1171 __ initialize_header(obj, klass, length, t1, t2);
1012 __ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte))); 1172 __ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte)));
1013 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); 1173 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
1014 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); 1174 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
1015 __ andl(t1, Klass::_lh_header_size_mask); 1175 __ andptr(t1, Klass::_lh_header_size_mask);
1016 __ subl(arr_size, t1); // body length 1176 __ subptr(arr_size, t1); // body length
1017 __ addl(t1, obj); // body start 1177 __ addptr(t1, obj); // body start
1018 __ initialize_body(t1, arr_size, 0, t2); 1178 __ initialize_body(t1, arr_size, 0, t2);
1019 __ verify_oop(obj); 1179 __ verify_oop(obj);
1020 __ ret(0); 1180 __ ret(0);
1021 1181
1022 __ bind(try_eden); 1182 __ bind(try_eden);
1023 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) 1183 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F))
1184 // since size is postive movl does right thing on 64bit
1024 __ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); 1185 __ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes()));
1186 // since size is postive movl does right thing on 64bit
1025 __ movl(arr_size, length); 1187 __ movl(arr_size, length);
1026 assert(t1 == rcx, "fixed register usage"); 1188 assert(t1 == rcx, "fixed register usage");
1027 __ shll(arr_size /* by t1=rcx, mod 32 */); 1189 __ shlptr(arr_size /* by t1=rcx, mod 32 */);
1028 __ shrl(t1, Klass::_lh_header_size_shift); 1190 __ shrptr(t1, Klass::_lh_header_size_shift);
1029 __ andl(t1, Klass::_lh_header_size_mask); 1191 __ andptr(t1, Klass::_lh_header_size_mask);
1030 __ addl(arr_size, t1); 1192 __ addptr(arr_size, t1);
1031 __ addl(arr_size, MinObjAlignmentInBytesMask); // align up 1193 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up
1032 __ andl(arr_size, ~MinObjAlignmentInBytesMask); 1194 __ andptr(arr_size, ~MinObjAlignmentInBytesMask);
1033 1195
1034 __ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size 1196 __ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size
1035 1197
1036 __ initialize_header(obj, klass, length, t1, t2); 1198 __ initialize_header(obj, klass, length, t1, t2);
1037 __ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte))); 1199 __ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte)));
1038 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); 1200 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
1039 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); 1201 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
1040 __ andl(t1, Klass::_lh_header_size_mask); 1202 __ andptr(t1, Klass::_lh_header_size_mask);
1041 __ subl(arr_size, t1); // body length 1203 __ subptr(arr_size, t1); // body length
1042 __ addl(t1, obj); // body start 1204 __ addptr(t1, obj); // body start
1043 __ initialize_body(t1, arr_size, 0, t2); 1205 __ initialize_body(t1, arr_size, 0, t2);
1044 __ verify_oop(obj); 1206 __ verify_oop(obj);
1045 __ ret(0); 1207 __ ret(0);
1046 1208
1047 __ bind(slow_path); 1209 __ bind(slow_path);
1087 1249
1088 case register_finalizer_id: 1250 case register_finalizer_id:
1089 { 1251 {
1090 __ set_info("register_finalizer", dont_gc_arguments); 1252 __ set_info("register_finalizer", dont_gc_arguments);
1091 1253
1254 // This is called via call_runtime so the arguments
1255 // will be place in C abi locations
1256
1257 #ifdef _LP64
1258 __ verify_oop(c_rarg0);
1259 __ mov(rax, c_rarg0);
1260 #else
1092 // The object is passed on the stack and we haven't pushed a 1261 // The object is passed on the stack and we haven't pushed a
1093 // frame yet so it's one work away from top of stack. 1262 // frame yet so it's one work away from top of stack.
1094 __ movl(rax, Address(rsp, 1 * BytesPerWord)); 1263 __ movptr(rax, Address(rsp, 1 * BytesPerWord));
1095 __ verify_oop(rax); 1264 __ verify_oop(rax);
1265 #endif // _LP64
1096 1266
1097 // load the klass and check the has finalizer flag 1267 // load the klass and check the has finalizer flag
1098 Label register_finalizer; 1268 Label register_finalizer;
1099 Register t = rsi; 1269 Register t = rsi;
1100 __ movl(t, Address(rax, oopDesc::klass_offset_in_bytes())); 1270 __ movptr(t, Address(rax, oopDesc::klass_offset_in_bytes()));
1101 __ movl(t, Address(t, Klass::access_flags_offset_in_bytes() + sizeof(oopDesc))); 1271 __ movl(t, Address(t, Klass::access_flags_offset_in_bytes() + sizeof(oopDesc)));
1102 __ testl(t, JVM_ACC_HAS_FINALIZER); 1272 __ testl(t, JVM_ACC_HAS_FINALIZER);
1103 __ jcc(Assembler::notZero, register_finalizer); 1273 __ jcc(Assembler::notZero, register_finalizer);
1104 __ ret(0); 1274 __ ret(0);
1105 1275
1183 break; 1353 break;
1184 1354
1185 case slow_subtype_check_id: 1355 case slow_subtype_check_id:
1186 { 1356 {
1187 enum layout { 1357 enum layout {
1188 rax_off, 1358 rax_off, SLOT2(raxH_off)
1189 rcx_off, 1359 rcx_off, SLOT2(rcxH_off)
1190 rsi_off, 1360 rsi_off, SLOT2(rsiH_off)
1191 rdi_off, 1361 rdi_off, SLOT2(rdiH_off)
1192 saved_rbp_off, 1362 // saved_rbp_off, SLOT2(saved_rbpH_off)
1193 return_off, 1363 return_off, SLOT2(returnH_off)
1194 sub_off, 1364 sub_off, SLOT2(subH_off)
1195 super_off, 1365 super_off, SLOT2(superH_off)
1196 framesize 1366 framesize
1197 }; 1367 };
1198 1368
1199 __ set_info("slow_subtype_check", dont_gc_arguments); 1369 __ set_info("slow_subtype_check", dont_gc_arguments);
1200 __ pushl(rdi); 1370 __ push(rdi);
1201 __ pushl(rsi); 1371 __ push(rsi);
1202 __ pushl(rcx); 1372 __ push(rcx);
1203 __ pushl(rax); 1373 __ push(rax);
1204 __ movl(rsi, Address(rsp, (super_off - 1) * BytesPerWord)); // super 1374
1205 __ movl(rax, Address(rsp, (sub_off - 1) * BytesPerWord)); // sub 1375 // This is called by pushing args and not with C abi
1206 1376 __ movptr(rsi, Address(rsp, (super_off) * VMRegImpl::stack_slot_size)); // super
1207 __ movl(rdi,Address(rsi,sizeof(oopDesc) + Klass::secondary_supers_offset_in_bytes())); 1377 __ movptr(rax, Address(rsp, (sub_off ) * VMRegImpl::stack_slot_size)); // sub
1208 __ movl(rcx,Address(rdi,arrayOopDesc::length_offset_in_bytes())); 1378
1209 __ addl(rdi,arrayOopDesc::base_offset_in_bytes(T_OBJECT)); 1379 __ movptr(rdi,Address(rsi,sizeof(oopDesc) + Klass::secondary_supers_offset_in_bytes()));
1380 // since size is postive movl does right thing on 64bit
1381 __ movl(rcx, Address(rdi, arrayOopDesc::length_offset_in_bytes()));
1382 __ addptr(rdi, arrayOopDesc::base_offset_in_bytes(T_OBJECT));
1210 1383
1211 Label miss; 1384 Label miss;
1212 __ repne_scan(); 1385 __ repne_scan();
1213 __ jcc(Assembler::notEqual, miss); 1386 __ jcc(Assembler::notEqual, miss);
1214 __ movl(Address(rsi,sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes()), rax); 1387 __ movptr(Address(rsi,sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes()), rax);
1215 __ movl(Address(rsp, (super_off - 1) * BytesPerWord), 1); // result 1388 __ movptr(Address(rsp, (super_off) * VMRegImpl::stack_slot_size), 1); // result
1216 __ popl(rax); 1389 __ pop(rax);
1217 __ popl(rcx); 1390 __ pop(rcx);
1218 __ popl(rsi); 1391 __ pop(rsi);
1219 __ popl(rdi); 1392 __ pop(rdi);
1220 __ ret(0); 1393 __ ret(0);
1221 1394
1222 __ bind(miss); 1395 __ bind(miss);
1223 __ movl(Address(rsp, (super_off - 1) * BytesPerWord), 0); // result 1396 __ movptr(Address(rsp, (super_off) * VMRegImpl::stack_slot_size), 0); // result
1224 __ popl(rax); 1397 __ pop(rax);
1225 __ popl(rcx); 1398 __ pop(rcx);
1226 __ popl(rsi); 1399 __ pop(rsi);
1227 __ popl(rdi); 1400 __ pop(rdi);
1228 __ ret(0); 1401 __ ret(0);
1229 } 1402 }
1230 break; 1403 break;
1231 1404
1232 case monitorenter_nofpu_id: 1405 case monitorenter_nofpu_id:
1235 case monitorenter_id: 1408 case monitorenter_id:
1236 { 1409 {
1237 StubFrame f(sasm, "monitorenter", dont_gc_arguments); 1410 StubFrame f(sasm, "monitorenter", dont_gc_arguments);
1238 OopMap* map = save_live_registers(sasm, 3, save_fpu_registers); 1411 OopMap* map = save_live_registers(sasm, 3, save_fpu_registers);
1239 1412
1413 // Called with store_parameter and not C abi
1414
1240 f.load_argument(1, rax); // rax,: object 1415 f.load_argument(1, rax); // rax,: object
1241 f.load_argument(0, rbx); // rbx,: lock address 1416 f.load_argument(0, rbx); // rbx,: lock address
1242 1417
1243 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx); 1418 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx);
1244 1419
1253 // fall through 1428 // fall through
1254 case monitorexit_id: 1429 case monitorexit_id:
1255 { 1430 {
1256 StubFrame f(sasm, "monitorexit", dont_gc_arguments); 1431 StubFrame f(sasm, "monitorexit", dont_gc_arguments);
1257 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); 1432 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers);
1433
1434 // Called with store_parameter and not C abi
1258 1435
1259 f.load_argument(0, rax); // rax,: lock address 1436 f.load_argument(0, rax); // rax,: lock address
1260 1437
1261 // note: really a leaf routine but must setup last java sp 1438 // note: really a leaf routine but must setup last java sp
1262 // => use call_RT for now (speed can be improved by 1439 // => use call_RT for now (speed can be improved by
1302 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments); 1479 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
1303 // we can't gc here so skip the oopmap but make sure that all 1480 // we can't gc here so skip the oopmap but make sure that all
1304 // the live registers get saved. 1481 // the live registers get saved.
1305 save_live_registers(sasm, 1); 1482 save_live_registers(sasm, 1);
1306 1483
1307 __ pushl(rax); 1484 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax));
1308 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc))); 1485 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc)));
1309 __ popl(rax); 1486 NOT_LP64(__ pop(rax));
1310 1487
1311 restore_live_registers(sasm); 1488 restore_live_registers(sasm);
1312 } 1489 }
1313 break; 1490 break;
1314 1491
1315 case fpu2long_stub_id: 1492 case fpu2long_stub_id:
1316 { 1493 {
1317 // rax, and rdx are destroyed, but should be free since the result is returned there 1494 // rax, and rdx are destroyed, but should be free since the result is returned there
1318 // preserve rsi,ecx 1495 // preserve rsi,ecx
1319 __ pushl(rsi); 1496 __ push(rsi);
1320 __ pushl(rcx); 1497 __ push(rcx);
1498 LP64_ONLY(__ push(rdx);)
1321 1499
1322 // check for NaN 1500 // check for NaN
1323 Label return0, do_return, return_min_jlong, do_convert; 1501 Label return0, do_return, return_min_jlong, do_convert;
1324 1502
1325 Address value_high_word(rsp, 8); 1503 Address value_high_word(rsp, wordSize + 4);
1326 Address value_low_word(rsp, 4); 1504 Address value_low_word(rsp, wordSize);
1327 Address result_high_word(rsp, 16); 1505 Address result_high_word(rsp, 3*wordSize + 4);
1328 Address result_low_word(rsp, 12); 1506 Address result_low_word(rsp, 3*wordSize);
1329 1507
1330 __ subl(rsp, 20); 1508 __ subptr(rsp, 32); // more than enough on 32bit
1331 __ fst_d(value_low_word); 1509 __ fst_d(value_low_word);
1332 __ movl(rax, value_high_word); 1510 __ movl(rax, value_high_word);
1333 __ andl(rax, 0x7ff00000); 1511 __ andl(rax, 0x7ff00000);
1334 __ cmpl(rax, 0x7ff00000); 1512 __ cmpl(rax, 0x7ff00000);
1335 __ jcc(Assembler::notEqual, do_convert); 1513 __ jcc(Assembler::notEqual, do_convert);
1338 __ orl(rax, value_low_word); 1516 __ orl(rax, value_low_word);
1339 __ jcc(Assembler::notZero, return0); 1517 __ jcc(Assembler::notZero, return0);
1340 1518
1341 __ bind(do_convert); 1519 __ bind(do_convert);
1342 __ fnstcw(Address(rsp, 0)); 1520 __ fnstcw(Address(rsp, 0));
1343 __ movzxw(rax, Address(rsp, 0)); 1521 __ movzwl(rax, Address(rsp, 0));
1344 __ orl(rax, 0xc00); 1522 __ orl(rax, 0xc00);
1345 __ movw(Address(rsp, 2), rax); 1523 __ movw(Address(rsp, 2), rax);
1346 __ fldcw(Address(rsp, 2)); 1524 __ fldcw(Address(rsp, 2));
1347 __ fwait(); 1525 __ fwait();
1348 __ fistp_d(result_low_word); 1526 __ fistp_d(result_low_word);
1349 __ fldcw(Address(rsp, 0)); 1527 __ fldcw(Address(rsp, 0));
1350 __ fwait(); 1528 __ fwait();
1351 __ movl(rax, result_low_word); 1529 // This gets the entire long in rax on 64bit
1530 __ movptr(rax, result_low_word);
1531 // testing of high bits
1352 __ movl(rdx, result_high_word); 1532 __ movl(rdx, result_high_word);
1353 __ movl(rcx, rax); 1533 __ mov(rcx, rax);
1354 // What the heck is the point of the next instruction??? 1534 // What the heck is the point of the next instruction???
1355 __ xorl(rcx, 0x0); 1535 __ xorl(rcx, 0x0);
1356 __ movl(rsi, 0x80000000); 1536 __ movl(rsi, 0x80000000);
1357 __ xorl(rsi, rdx); 1537 __ xorl(rsi, rdx);
1358 __ orl(rcx, rsi); 1538 __ orl(rcx, rsi);
1359 __ jcc(Assembler::notEqual, do_return); 1539 __ jcc(Assembler::notEqual, do_return);
1360 __ fldz(); 1540 __ fldz();
1361 __ fcomp_d(value_low_word); 1541 __ fcomp_d(value_low_word);
1362 __ fnstsw_ax(); 1542 __ fnstsw_ax();
1543 #ifdef _LP64
1544 __ testl(rax, 0x4100); // ZF & CF == 0
1545 __ jcc(Assembler::equal, return_min_jlong);
1546 #else
1363 __ sahf(); 1547 __ sahf();
1364 __ jcc(Assembler::above, return_min_jlong); 1548 __ jcc(Assembler::above, return_min_jlong);
1549 #endif // _LP64
1365 // return max_jlong 1550 // return max_jlong
1551 #ifndef _LP64
1366 __ movl(rdx, 0x7fffffff); 1552 __ movl(rdx, 0x7fffffff);
1367 __ movl(rax, 0xffffffff); 1553 __ movl(rax, 0xffffffff);
1554 #else
1555 __ mov64(rax, CONST64(0x7fffffffffffffff));
1556 #endif // _LP64
1368 __ jmp(do_return); 1557 __ jmp(do_return);
1369 1558
1370 __ bind(return_min_jlong); 1559 __ bind(return_min_jlong);
1560 #ifndef _LP64
1371 __ movl(rdx, 0x80000000); 1561 __ movl(rdx, 0x80000000);
1372 __ xorl(rax, rax); 1562 __ xorl(rax, rax);
1563 #else
1564 __ mov64(rax, CONST64(0x8000000000000000));
1565 #endif // _LP64
1373 __ jmp(do_return); 1566 __ jmp(do_return);
1374 1567
1375 __ bind(return0); 1568 __ bind(return0);
1376 __ fpop(); 1569 __ fpop();
1377 __ xorl(rdx,rdx); 1570 #ifndef _LP64
1378 __ xorl(rax,rax); 1571 __ xorptr(rdx,rdx);
1572 __ xorptr(rax,rax);
1573 #else
1574 __ xorptr(rax, rax);
1575 #endif // _LP64
1379 1576
1380 __ bind(do_return); 1577 __ bind(do_return);
1381 __ addl(rsp, 20); 1578 __ addptr(rsp, 32);
1382 __ popl(rcx); 1579 LP64_ONLY(__ pop(rdx);)
1383 __ popl(rsi); 1580 __ pop(rcx);
1581 __ pop(rsi);
1384 __ ret(0); 1582 __ ret(0);
1385 } 1583 }
1386 break; 1584 break;
1387 1585
1388 default: 1586 default:
1389 { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments); 1587 { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
1390 __ movl(rax, (int)id); 1588 __ movptr(rax, (int)id);
1391 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); 1589 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
1392 __ should_not_reach_here(); 1590 __ should_not_reach_here();
1393 } 1591 }
1394 break; 1592 break;
1395 } 1593 }