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comparison src/cpu/x86/vm/interpreterRT_x86_64.cpp @ 304:dc7f315e41f7

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5108146: Merge i486 and amd64 cpu directories 6459804: Want client (c1) compiler for x86_64 (amd64) for faster start-up Reviewed-by: kvn
author never
date Wed, 27 Aug 2008 00:21:55 -0700
parents a61af66fc99e
children 9ee9cf798b59
comparison
equal deleted inserted replaced
303:fa4d1d240383 304:dc7f315e41f7
91 const Address src(from(), Interpreter::local_offset_in_bytes(offset() + 1)); 91 const Address src(from(), Interpreter::local_offset_in_bytes(offset() + 1));
92 92
93 #ifdef _WIN64 93 #ifdef _WIN64
94 switch (_num_args) { 94 switch (_num_args) {
95 case 0: 95 case 0:
96 __ movq(c_rarg1, src); 96 __ movptr(c_rarg1, src);
97 _num_args++; 97 _num_args++;
98 break; 98 break;
99 case 1: 99 case 1:
100 __ movq(c_rarg2, src); 100 __ movptr(c_rarg2, src);
101 _num_args++; 101 _num_args++;
102 break; 102 break;
103 case 2: 103 case 2:
104 __ movq(c_rarg3, src); 104 __ movptr(c_rarg3, src);
105 _num_args++; 105 _num_args++;
106 break; 106 break;
107 case 3: 107 case 3:
108 default: 108 default:
109 __ movq(rax, src); 109 __ movptr(rax, src);
110 __ movq(Address(to(), _stack_offset), rax); 110 __ movptr(Address(to(), _stack_offset), rax);
111 _stack_offset += wordSize; 111 _stack_offset += wordSize;
112 break; 112 break;
113 } 113 }
114 #else 114 #else
115 switch (_num_int_args) { 115 switch (_num_int_args) {
116 case 0: 116 case 0:
117 __ movq(c_rarg1, src); 117 __ movptr(c_rarg1, src);
118 _num_int_args++; 118 _num_int_args++;
119 break; 119 break;
120 case 1: 120 case 1:
121 __ movq(c_rarg2, src); 121 __ movptr(c_rarg2, src);
122 _num_int_args++; 122 _num_int_args++;
123 break; 123 break;
124 case 2: 124 case 2:
125 __ movq(c_rarg3, src); 125 __ movptr(c_rarg3, src);
126 _num_int_args++; 126 _num_int_args++;
127 break; 127 break;
128 case 3: 128 case 3:
129 __ movq(c_rarg4, src); 129 __ movptr(c_rarg4, src);
130 _num_int_args++; 130 _num_int_args++;
131 break; 131 break;
132 case 4: 132 case 4:
133 __ movq(c_rarg5, src); 133 __ movptr(c_rarg5, src);
134 _num_int_args++; 134 _num_int_args++;
135 break; 135 break;
136 default: 136 default:
137 __ movq(rax, src); 137 __ movptr(rax, src);
138 __ movq(Address(to(), _stack_offset), rax); 138 __ movptr(Address(to(), _stack_offset), rax);
139 _stack_offset += wordSize; 139 _stack_offset += wordSize;
140 break; 140 break;
141 } 141 }
142 #endif 142 #endif
143 } 143 }
169 169
170 #ifdef _WIN64 170 #ifdef _WIN64
171 if (_num_args < Argument::n_float_register_parameters_c-1) { 171 if (_num_args < Argument::n_float_register_parameters_c-1) {
172 __ movdbl(as_XMMRegister(++_num_args), src); 172 __ movdbl(as_XMMRegister(++_num_args), src);
173 } else { 173 } else {
174 __ movq(rax, src); 174 __ movptr(rax, src);
175 __ movq(Address(to(), _stack_offset), rax); 175 __ movptr(Address(to(), _stack_offset), rax);
176 _stack_offset += wordSize; 176 _stack_offset += wordSize;
177 } 177 }
178 #else 178 #else
179 if (_num_fp_args < Argument::n_float_register_parameters_c) { 179 if (_num_fp_args < Argument::n_float_register_parameters_c) {
180 __ movdbl(as_XMMRegister(_num_fp_args++), src); 180 __ movdbl(as_XMMRegister(_num_fp_args++), src);
181 } else { 181 } else {
182 __ movq(rax, src); 182 __ movptr(rax, src);
183 __ movq(Address(to(), _stack_offset), rax); 183 __ movptr(Address(to(), _stack_offset), rax);
184 _stack_offset += wordSize; 184 _stack_offset += wordSize;
185 } 185 }
186 #endif 186 #endif
187 } 187 }
188 188
191 191
192 #ifdef _WIN64 192 #ifdef _WIN64
193 switch (_num_args) { 193 switch (_num_args) {
194 case 0: 194 case 0:
195 assert(offset() == 0, "argument register 1 can only be (non-null) receiver"); 195 assert(offset() == 0, "argument register 1 can only be (non-null) receiver");
196 __ leaq(c_rarg1, src); 196 __ lea(c_rarg1, src);
197 _num_args++; 197 _num_args++;
198 break; 198 break;
199 case 1: 199 case 1:
200 __ leaq(rax, src); 200 __ lea(rax, src);
201 __ xorl(c_rarg2, c_rarg2); 201 __ xorl(c_rarg2, c_rarg2);
202 __ cmpq(src, 0); 202 __ cmpptr(src, 0);
203 __ cmovq(Assembler::notEqual, c_rarg2, rax); 203 __ cmov(Assembler::notEqual, c_rarg2, rax);
204 _num_args++; 204 _num_args++;
205 break; 205 break;
206 case 2: 206 case 2:
207 __ leaq(rax, src); 207 __ lea(rax, src);
208 __ xorl(c_rarg3, c_rarg3); 208 __ xorl(c_rarg3, c_rarg3);
209 __ cmpq(src, 0); 209 __ cmpptr(src, 0);
210 __ cmovq(Assembler::notEqual, c_rarg3, rax); 210 __ cmov(Assembler::notEqual, c_rarg3, rax);
211 _num_args++; 211 _num_args++;
212 break; 212 break;
213 default: 213 default:
214 __ leaq(rax, src); 214 __ lea(rax, src);
215 __ xorl(temp(), temp()); 215 __ xorl(temp(), temp());
216 __ cmpq(src, 0); 216 __ cmpptr(src, 0);
217 __ cmovq(Assembler::notEqual, temp(), rax); 217 __ cmov(Assembler::notEqual, temp(), rax);
218 __ movq(Address(to(), _stack_offset), temp()); 218 __ movptr(Address(to(), _stack_offset), temp());
219 _stack_offset += wordSize; 219 _stack_offset += wordSize;
220 break; 220 break;
221 } 221 }
222 #else 222 #else
223 switch (_num_int_args) { 223 switch (_num_int_args) {
224 case 0: 224 case 0:
225 assert(offset() == 0, "argument register 1 can only be (non-null) receiver"); 225 assert(offset() == 0, "argument register 1 can only be (non-null) receiver");
226 __ leaq(c_rarg1, src); 226 __ lea(c_rarg1, src);
227 _num_int_args++; 227 _num_int_args++;
228 break; 228 break;
229 case 1: 229 case 1:
230 __ leaq(rax, src); 230 __ lea(rax, src);
231 __ xorl(c_rarg2, c_rarg2); 231 __ xorl(c_rarg2, c_rarg2);
232 __ cmpq(src, 0); 232 __ cmpptr(src, 0);
233 __ cmovq(Assembler::notEqual, c_rarg2, rax); 233 __ cmov(Assembler::notEqual, c_rarg2, rax);
234 _num_int_args++; 234 _num_int_args++;
235 break; 235 break;
236 case 2: 236 case 2:
237 __ leaq(rax, src); 237 __ lea(rax, src);
238 __ xorl(c_rarg3, c_rarg3); 238 __ xorl(c_rarg3, c_rarg3);
239 __ cmpq(src, 0); 239 __ cmpptr(src, 0);
240 __ cmovq(Assembler::notEqual, c_rarg3, rax); 240 __ cmov(Assembler::notEqual, c_rarg3, rax);
241 _num_int_args++; 241 _num_int_args++;
242 break; 242 break;
243 case 3: 243 case 3:
244 __ leaq(rax, src); 244 __ lea(rax, src);
245 __ xorl(c_rarg4, c_rarg4); 245 __ xorl(c_rarg4, c_rarg4);
246 __ cmpq(src, 0); 246 __ cmpptr(src, 0);
247 __ cmovq(Assembler::notEqual, c_rarg4, rax); 247 __ cmov(Assembler::notEqual, c_rarg4, rax);
248 _num_int_args++; 248 _num_int_args++;
249 break; 249 break;
250 case 4: 250 case 4:
251 __ leaq(rax, src); 251 __ lea(rax, src);
252 __ xorl(c_rarg5, c_rarg5); 252 __ xorl(c_rarg5, c_rarg5);
253 __ cmpq(src, 0); 253 __ cmpptr(src, 0);
254 __ cmovq(Assembler::notEqual, c_rarg5, rax); 254 __ cmov(Assembler::notEqual, c_rarg5, rax);
255 _num_int_args++; 255 _num_int_args++;
256 break; 256 break;
257 default: 257 default:
258 __ leaq(rax, src); 258 __ lea(rax, src);
259 __ xorl(temp(), temp()); 259 __ xorl(temp(), temp());
260 __ cmpq(src, 0); 260 __ cmpptr(src, 0);
261 __ cmovq(Assembler::notEqual, temp(), rax); 261 __ cmov(Assembler::notEqual, temp(), rax);
262 __ movq(Address(to(), _stack_offset), temp()); 262 __ movptr(Address(to(), _stack_offset), temp());
263 _stack_offset += wordSize; 263 _stack_offset += wordSize;
264 break; 264 break;
265 } 265 }
266 #endif 266 #endif
267 } 267 }