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comparison src/share/vm/c1/c1_LIR.hpp @ 304:dc7f315e41f7

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5108146: Merge i486 and amd64 cpu directories 6459804: Want client (c1) compiler for x86_64 (amd64) for faster start-up Reviewed-by: kvn
author never
date Wed, 27 Aug 2008 00:21:55 -0700
parents a61af66fc99e
children 9ee9cf798b59
comparison
equal deleted inserted replaced
303:fa4d1d240383 304:dc7f315e41f7
133 return high(jlong_cast(_value.get_jdouble())); 133 return high(jlong_cast(_value.get_jdouble()));
134 } else { 134 } else {
135 return as_jint_hi(); 135 return as_jint_hi();
136 } 136 }
137 } 137 }
138 jlong as_jlong_bits() const {
139 if (type() == T_DOUBLE) {
140 return jlong_cast(_value.get_jdouble());
141 } else {
142 return as_jlong();
143 }
144 }
138 145
139 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; 146 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
140 147
141 148
142 bool is_zero_float() { 149 bool is_zero_float() {
300 return single_size; 307 return single_size;
301 break; 308 break;
302 309
303 default: 310 default:
304 ShouldNotReachHere(); 311 ShouldNotReachHere();
312 return single_size;
305 } 313 }
306 } 314 }
307 315
308 316
309 void validate_type() const PRODUCT_RETURN; 317 void validate_type() const PRODUCT_RETURN;
415 } 423 }
416 #endif 424 #endif
417 return as_register(); 425 return as_register();
418 } 426 }
419 427
420 #ifdef IA32 428 #ifdef X86
421 XMMRegister as_xmm_float_reg() const; 429 XMMRegister as_xmm_float_reg() const;
422 XMMRegister as_xmm_double_reg() const; 430 XMMRegister as_xmm_double_reg() const;
423 // for compatibility with RInfo 431 // for compatibility with RInfo
424 int fpu () const { return lo_reg_half(); } 432 int fpu () const { return lo_reg_half(); }
425 #endif 433 #endif // X86
426 434
427 #ifdef SPARC 435 #ifdef SPARC
428 FloatRegister as_float_reg () const; 436 FloatRegister as_float_reg () const;
429 FloatRegister as_double_reg () const; 437 FloatRegister as_double_reg () const;
430 #endif 438 #endif
501 , _index(LIR_OprDesc::illegalOpr()) 509 , _index(LIR_OprDesc::illegalOpr())
502 , _scale(times_1) 510 , _scale(times_1)
503 , _type(type) 511 , _type(type)
504 , _disp(disp) { verify(); } 512 , _disp(disp) { verify(); }
505 513
506 #ifdef IA32 514 #ifdef X86
507 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, int disp, BasicType type): 515 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, int disp, BasicType type):
508 _base(base) 516 _base(base)
509 , _index(index) 517 , _index(index)
510 , _scale(scale) 518 , _scale(scale)
511 , _type(type) 519 , _type(type)
512 , _disp(disp) { verify(); } 520 , _disp(disp) { verify(); }
513 #endif 521 #endif // X86
514 522
515 LIR_Opr base() const { return _base; } 523 LIR_Opr base() const { return _base; }
516 LIR_Opr index() const { return _index; } 524 LIR_Opr index() const { return _index; }
517 Scale scale() const { return _scale; } 525 Scale scale() const { return _scale; }
518 intx disp() const { return _disp; } 526 intx disp() const { return _disp; }
533 class LIR_OprFact: public AllStatic { 541 class LIR_OprFact: public AllStatic {
534 public: 542 public:
535 543
536 static LIR_Opr illegalOpr; 544 static LIR_Opr illegalOpr;
537 545
538 static LIR_Opr single_cpu(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::int_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); } 546 static LIR_Opr single_cpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::int_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
539 static LIR_Opr single_cpu_oop(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::object_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); } 547 static LIR_Opr single_cpu_oop(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::object_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
540 static LIR_Opr double_cpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::long_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); } 548 static LIR_Opr double_cpu(int reg1, int reg2) {
541 549 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
542 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::fpu_register | LIR_OprDesc::single_size); } 550 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
551 (reg2 << LIR_OprDesc::reg2_shift) |
552 LIR_OprDesc::long_type |
553 LIR_OprDesc::cpu_register |
554 LIR_OprDesc::double_size);
555 }
556
557 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
558 LIR_OprDesc::float_type |
559 LIR_OprDesc::fpu_register |
560 LIR_OprDesc::single_size); }
543 561
544 #ifdef SPARC 562 #ifdef SPARC
545 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); } 563 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
564 (reg2 << LIR_OprDesc::reg2_shift) |
565 LIR_OprDesc::double_type |
566 LIR_OprDesc::fpu_register |
567 LIR_OprDesc::double_size); }
546 #endif 568 #endif
547 #ifdef IA32 569 #ifdef X86
548 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | (reg << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); } 570 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
549 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::fpu_register | LIR_OprDesc::single_size | LIR_OprDesc::is_xmm_mask); } 571 (reg << LIR_OprDesc::reg2_shift) |
550 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | (reg << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size | LIR_OprDesc::is_xmm_mask); } 572 LIR_OprDesc::double_type |
551 #endif 573 LIR_OprDesc::fpu_register |
574 LIR_OprDesc::double_size); }
575
576 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
577 LIR_OprDesc::float_type |
578 LIR_OprDesc::fpu_register |
579 LIR_OprDesc::single_size |
580 LIR_OprDesc::is_xmm_mask); }
581 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
582 (reg << LIR_OprDesc::reg2_shift) |
583 LIR_OprDesc::double_type |
584 LIR_OprDesc::fpu_register |
585 LIR_OprDesc::double_size |
586 LIR_OprDesc::is_xmm_mask); }
587 #endif // X86
552 588
553 589
554 static LIR_Opr virtual_register(int index, BasicType type) { 590 static LIR_Opr virtual_register(int index, BasicType type) {
555 LIR_Opr res; 591 LIR_Opr res;
556 switch (type) { 592 switch (type) {
557 case T_OBJECT: // fall through 593 case T_OBJECT: // fall through
558 case T_ARRAY: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::object_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size | LIR_OprDesc::virtual_mask); break; 594 case T_ARRAY:
559 case T_INT: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::int_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size | LIR_OprDesc::virtual_mask); break; 595 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
560 case T_LONG: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::long_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size | LIR_OprDesc::virtual_mask); break; 596 LIR_OprDesc::object_type |
561 case T_FLOAT: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::float_type | LIR_OprDesc::fpu_register | LIR_OprDesc::single_size | LIR_OprDesc::virtual_mask); break; 597 LIR_OprDesc::cpu_register |
562 case T_DOUBLE: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size | LIR_OprDesc::virtual_mask); break; 598 LIR_OprDesc::single_size |
599 LIR_OprDesc::virtual_mask);
600 break;
601
602 case T_INT:
603 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
604 LIR_OprDesc::int_type |
605 LIR_OprDesc::cpu_register |
606 LIR_OprDesc::single_size |
607 LIR_OprDesc::virtual_mask);
608 break;
609
610 case T_LONG:
611 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
612 LIR_OprDesc::long_type |
613 LIR_OprDesc::cpu_register |
614 LIR_OprDesc::double_size |
615 LIR_OprDesc::virtual_mask);
616 break;
617
618 case T_FLOAT:
619 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
620 LIR_OprDesc::float_type |
621 LIR_OprDesc::fpu_register |
622 LIR_OprDesc::single_size |
623 LIR_OprDesc::virtual_mask);
624 break;
625
626 case
627 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
628 LIR_OprDesc::double_type |
629 LIR_OprDesc::fpu_register |
630 LIR_OprDesc::double_size |
631 LIR_OprDesc::virtual_mask);
632 break;
563 633
564 default: ShouldNotReachHere(); res = illegalOpr; 634 default: ShouldNotReachHere(); res = illegalOpr;
565 } 635 }
566 636
567 #ifdef ASSERT 637 #ifdef ASSERT
570 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base"); 640 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
571 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); 641 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
572 642
573 // old-style calculation; check if old and new method are equal 643 // old-style calculation; check if old and new method are equal
574 LIR_OprDesc::OprType t = as_OprType(type); 644 LIR_OprDesc::OprType t = as_OprType(type);
575 LIR_Opr old_res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | t | 645 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
576 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) | 646 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
577 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); 647 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
578 assert(res == old_res, "old and new method not equal"); 648 assert(res == old_res, "old and new method not equal");
579 #endif 649 #endif
580 650
581 return res; 651 return res;
586 // index 2. 656 // index 2.
587 static LIR_Opr stack(int index, BasicType type) { 657 static LIR_Opr stack(int index, BasicType type) {
588 LIR_Opr res; 658 LIR_Opr res;
589 switch (type) { 659 switch (type) {
590 case T_OBJECT: // fall through 660 case T_OBJECT: // fall through
591 case T_ARRAY: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::object_type | LIR_OprDesc::stack_value | LIR_OprDesc::single_size); break; 661 case T_ARRAY:
592 case T_INT: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::int_type | LIR_OprDesc::stack_value | LIR_OprDesc::single_size); break; 662 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
593 case T_LONG: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::long_type | LIR_OprDesc::stack_value | LIR_OprDesc::double_size); break; 663 LIR_OprDesc::object_type |
594 case T_FLOAT: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::float_type | LIR_OprDesc::stack_value | LIR_OprDesc::single_size); break; 664 LIR_OprDesc::stack_value |
595 case T_DOUBLE: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::double_type | LIR_OprDesc::stack_value | LIR_OprDesc::double_size); break; 665 LIR_OprDesc::single_size);
666 break;
667
668 case T_INT:
669 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
670 LIR_OprDesc::int_type |
671 LIR_OprDesc::stack_value |
672 LIR_OprDesc::single_size);
673 break;
674
675 case T_LONG:
676 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
677 LIR_OprDesc::long_type |
678 LIR_OprDesc::stack_value |
679 LIR_OprDesc::double_size);
680 break;
681
682 case T_FLOAT:
683 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
684 LIR_OprDesc::float_type |
685 LIR_OprDesc::stack_value |
686 LIR_OprDesc::single_size);
687 break;
688 case T_DOUBLE:
689 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
690 LIR_OprDesc::double_type |
691 LIR_OprDesc::stack_value |
692 LIR_OprDesc::double_size);
693 break;
596 694
597 default: ShouldNotReachHere(); res = illegalOpr; 695 default: ShouldNotReachHere(); res = illegalOpr;
598 } 696 }
599 697
600 #ifdef ASSERT 698 #ifdef ASSERT
601 assert(index >= 0, "index must be positive"); 699 assert(index >= 0, "index must be positive");
602 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); 700 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
603 701
604 LIR_Opr old_res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::stack_value | as_OprType(type) | LIR_OprDesc::size_for(type)); 702 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
703 LIR_OprDesc::stack_value |
704 as_OprType(type) |
705 LIR_OprDesc::size_for(type));
605 assert(res == old_res, "old and new method not equal"); 706 assert(res == old_res, "old and new method not equal");
606 #endif 707 #endif
607 708
608 return res; 709 return res;
609 } 710 }