comparison src/cpu/sparc/vm/assembler_sparc.hpp @ 1006:dcf03e02b020

6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845 Summary: For signatures with a large number of arguments the offset for the float store becomes too big and does not fit in 13-bit. Reviewed-by: kvn, never
author twisti
date Tue, 06 Oct 2009 02:11:49 -0700
parents 62001a362ce9
children d7f654633cfe f03d0a26bf83
comparison
equal deleted inserted replaced
997:46b819ba120b 1006:dcf03e02b020
1277 void jmpl( Register s1, Register s2, Register d ); 1277 void jmpl( Register s1, Register s2, Register d );
1278 void jmpl( Register s1, int simm13a, Register d, RelocationHolder const& rspec = RelocationHolder() ); 1278 void jmpl( Register s1, int simm13a, Register d, RelocationHolder const& rspec = RelocationHolder() );
1279 1279
1280 // 171 1280 // 171
1281 1281
1282 inline void ldf(FloatRegisterImpl::Width w, Register s1, RegisterOrConstant s2, FloatRegister d);
1282 inline void ldf(FloatRegisterImpl::Width w, Register s1, Register s2, FloatRegister d); 1283 inline void ldf(FloatRegisterImpl::Width w, Register s1, Register s2, FloatRegister d);
1283 inline void ldf(FloatRegisterImpl::Width w, Register s1, int simm13a, FloatRegister d, RelocationHolder const& rspec = RelocationHolder()); 1284 inline void ldf(FloatRegisterImpl::Width w, Register s1, int simm13a, FloatRegister d, RelocationHolder const& rspec = RelocationHolder());
1284 1285
1285 inline void ldf(FloatRegisterImpl::Width w, const Address& a, FloatRegister d, int offset = 0); 1286 inline void ldf(FloatRegisterImpl::Width w, const Address& a, FloatRegister d, int offset = 0);
1286 1287
1533 1534
1534 void stbar() { emit_long( op(arith_op) | op3(membar_op3) | u_field(15, 18, 14)); } 1535 void stbar() { emit_long( op(arith_op) | op3(membar_op3) | u_field(15, 18, 14)); }
1535 1536
1536 // pp 222 1537 // pp 222
1537 1538
1538 inline void stf( FloatRegisterImpl::Width w, FloatRegister d, Register s1, Register s2 ); 1539 inline void stf( FloatRegisterImpl::Width w, FloatRegister d, Register s1, RegisterOrConstant s2);
1540 inline void stf( FloatRegisterImpl::Width w, FloatRegister d, Register s1, Register s2);
1539 inline void stf( FloatRegisterImpl::Width w, FloatRegister d, Register s1, int simm13a); 1541 inline void stf( FloatRegisterImpl::Width w, FloatRegister d, Register s1, int simm13a);
1540 inline void stf( FloatRegisterImpl::Width w, FloatRegister d, const Address& a, int offset = 0); 1542 inline void stf( FloatRegisterImpl::Width w, FloatRegister d, const Address& a, int offset = 0);
1541 1543
1542 inline void stfsr( Register s1, Register s2 ); 1544 inline void stfsr( Register s1, Register s2 );
1543 inline void stfsr( Register s1, int simm13a); 1545 inline void stfsr( Register s1, int simm13a);
2047 // the temp argument is required, and is used to materialize the constant. 2049 // the temp argument is required, and is used to materialize the constant.
2048 void regcon_inc_ptr( RegisterOrConstant& dest, RegisterOrConstant src, 2050 void regcon_inc_ptr( RegisterOrConstant& dest, RegisterOrConstant src,
2049 Register temp = noreg ); 2051 Register temp = noreg );
2050 void regcon_sll_ptr( RegisterOrConstant& dest, RegisterOrConstant src, 2052 void regcon_sll_ptr( RegisterOrConstant& dest, RegisterOrConstant src,
2051 Register temp = noreg ); 2053 Register temp = noreg );
2052 RegisterOrConstant ensure_rs2(RegisterOrConstant rs2, Register sethi_temp) { 2054
2053 guarantee(sethi_temp != noreg, "constant offset overflow"); 2055 RegisterOrConstant ensure_simm13_or_reg(RegisterOrConstant roc, Register Rtemp) {
2054 if (is_simm13(rs2.constant_or_zero())) 2056 guarantee(Rtemp != noreg, "constant offset overflow");
2055 return rs2; // register or short constant 2057 if (is_simm13(roc.constant_or_zero()))
2056 set(rs2.as_constant(), sethi_temp); 2058 return roc; // register or short constant
2057 return sethi_temp; 2059 set(roc.as_constant(), Rtemp);
2060 return RegisterOrConstant(Rtemp);
2058 } 2061 }
2059 2062
2060 // -------------------------------------------------- 2063 // --------------------------------------------------
2061 2064
2062 public: 2065 public: