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comparison src/cpu/x86/vm/vm_version_x86.hpp @ 6948:e522a00b91aa

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Merge with http://hg.openjdk.java.net/hsx/hsx25/hotspot/ after NPG - C++ build works
author Doug Simon <doug.simon@oracle.com>
date Mon, 12 Nov 2012 23:14:12 +0100
parents 33df1aeaebbf a3ecd773a7b9
children 989155e2d07a
comparison
equal deleted inserted replaced
6711:ae13cc658b80 6948:e522a00b91aa
1 /* 1 /*
2 * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. 2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 * 4 *
5 * This code is free software; you can redistribute it and/or modify it 5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as 6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation. 7 * published by the Free Software Foundation.
76 dca : 1, 76 dca : 1,
77 sse4_1 : 1, 77 sse4_1 : 1,
78 sse4_2 : 1, 78 sse4_2 : 1,
79 : 2, 79 : 2,
80 popcnt : 1, 80 popcnt : 1,
81 : 3, 81 : 1,
82 aes : 1,
83 : 1,
82 osxsave : 1, 84 osxsave : 1,
83 avx : 1, 85 avx : 1,
84 : 3; 86 : 3;
85 } bits; 87 } bits;
86 }; 88 };
242 CPU_POPCNT = (1 << 13), 244 CPU_POPCNT = (1 << 13),
243 CPU_LZCNT = (1 << 14), 245 CPU_LZCNT = (1 << 14),
244 CPU_TSC = (1 << 15), 246 CPU_TSC = (1 << 15),
245 CPU_TSCINV = (1 << 16), 247 CPU_TSCINV = (1 << 16),
246 CPU_AVX = (1 << 17), 248 CPU_AVX = (1 << 17),
247 CPU_AVX2 = (1 << 18) 249 CPU_AVX2 = (1 << 18),
250 CPU_AES = (1 << 19)
248 } cpuFeatureFlags; 251 } cpuFeatureFlags;
249 252
250 enum { 253 enum {
251 // AMD 254 // AMD
252 CPU_FAMILY_AMD_11H = 0x11, 255 CPU_FAMILY_AMD_11H = 0x11,
418 } 421 }
419 if (_cpuid_info.std_cpuid1_edx.bits.tsc != 0) 422 if (_cpuid_info.std_cpuid1_edx.bits.tsc != 0)
420 result |= CPU_TSC; 423 result |= CPU_TSC;
421 if (_cpuid_info.ext_cpuid7_edx.bits.tsc_invariance != 0) 424 if (_cpuid_info.ext_cpuid7_edx.bits.tsc_invariance != 0)
422 result |= CPU_TSCINV; 425 result |= CPU_TSCINV;
426 if (_cpuid_info.std_cpuid1_ecx.bits.aes != 0)
427 result |= CPU_AES;
423 428
424 // AMD features. 429 // AMD features.
425 if (is_amd()) { 430 if (is_amd()) {
426 if ((_cpuid_info.ext_cpuid1_edx.bits.tdnow != 0) || 431 if ((_cpuid_info.ext_cpuid1_edx.bits.tdnow != 0) ||
427 (_cpuid_info.ext_cpuid1_ecx.bits.prefetchw != 0)) 432 (_cpuid_info.ext_cpuid1_ecx.bits.prefetchw != 0))
542 static bool supports_sse4_2() { return (_cpuFeatures & CPU_SSE4_2) != 0; } 547 static bool supports_sse4_2() { return (_cpuFeatures & CPU_SSE4_2) != 0; }
543 static bool supports_popcnt() { return (_cpuFeatures & CPU_POPCNT) != 0; } 548 static bool supports_popcnt() { return (_cpuFeatures & CPU_POPCNT) != 0; }
544 static bool supports_avx() { return (_cpuFeatures & CPU_AVX) != 0; } 549 static bool supports_avx() { return (_cpuFeatures & CPU_AVX) != 0; }
545 static bool supports_avx2() { return (_cpuFeatures & CPU_AVX2) != 0; } 550 static bool supports_avx2() { return (_cpuFeatures & CPU_AVX2) != 0; }
546 static bool supports_tsc() { return (_cpuFeatures & CPU_TSC) != 0; } 551 static bool supports_tsc() { return (_cpuFeatures & CPU_TSC) != 0; }
552 static bool supports_aes() { return (_cpuFeatures & CPU_AES) != 0; }
547 553
548 // Intel features 554 // Intel features
549 static bool is_intel_family_core() { return is_intel() && 555 static bool is_intel_family_core() { return is_intel() &&
550 extended_cpu_family() == CPU_FAMILY_INTEL_CORE; } 556 extended_cpu_family() == CPU_FAMILY_INTEL_CORE; }
551 557