Mercurial > hg > truffle
comparison src/share/vm/opto/mulnode.cpp @ 6804:e626685e9f6c
7193318: C2: remove number of inputs requirement from Node's new operator
Summary: Deleted placement new operator of Node - node(size_t, Compile *, int).
Reviewed-by: kvn, twisti
Contributed-by: bharadwaj.yadavalli@oracle.com
author | kvn |
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date | Thu, 27 Sep 2012 09:38:42 -0700 |
parents | c7b60b601eb4 |
children | b9a9ed0f8eeb f6badecb7ea7 |
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6803:06f52c4d0e18 | 6804:e626685e9f6c |
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196 | 196 |
197 // Get low bit; check for being the only bit | 197 // Get low bit; check for being the only bit |
198 Node *res = NULL; | 198 Node *res = NULL; |
199 jint bit1 = con & -con; // Extract low bit | 199 jint bit1 = con & -con; // Extract low bit |
200 if( bit1 == con ) { // Found a power of 2? | 200 if( bit1 == con ) { // Found a power of 2? |
201 res = new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ); | 201 res = new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ); |
202 } else { | 202 } else { |
203 | 203 |
204 // Check for constant with 2 bits set | 204 // Check for constant with 2 bits set |
205 jint bit2 = con-bit1; | 205 jint bit2 = con-bit1; |
206 bit2 = bit2 & -bit2; // Extract 2nd bit | 206 bit2 = bit2 & -bit2; // Extract 2nd bit |
207 if( bit2 + bit1 == con ) { // Found all bits in con? | 207 if( bit2 + bit1 == con ) { // Found all bits in con? |
208 Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) ); | 208 Node *n1 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) ); |
209 Node *n2 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) ); | 209 Node *n2 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) ); |
210 res = new (phase->C, 3) AddINode( n2, n1 ); | 210 res = new (phase->C) AddINode( n2, n1 ); |
211 | 211 |
212 } else if (is_power_of_2(con+1)) { | 212 } else if (is_power_of_2(con+1)) { |
213 // Sleezy: power-of-2 -1. Next time be generic. | 213 // Sleezy: power-of-2 -1. Next time be generic. |
214 jint temp = (jint) (con + 1); | 214 jint temp = (jint) (con + 1); |
215 Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) ); | 215 Node *n1 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) ); |
216 res = new (phase->C, 3) SubINode( n1, in(1) ); | 216 res = new (phase->C) SubINode( n1, in(1) ); |
217 } else { | 217 } else { |
218 return MulNode::Ideal(phase, can_reshape); | 218 return MulNode::Ideal(phase, can_reshape); |
219 } | 219 } |
220 } | 220 } |
221 | 221 |
222 if( sign_flip ) { // Need to negate result? | 222 if( sign_flip ) { // Need to negate result? |
223 res = phase->transform(res);// Transform, before making the zero con | 223 res = phase->transform(res);// Transform, before making the zero con |
224 res = new (phase->C, 3) SubINode(phase->intcon(0),res); | 224 res = new (phase->C) SubINode(phase->intcon(0),res); |
225 } | 225 } |
226 | 226 |
227 return res; // Return final result | 227 return res; // Return final result |
228 } | 228 } |
229 | 229 |
292 | 292 |
293 // Get low bit; check for being the only bit | 293 // Get low bit; check for being the only bit |
294 Node *res = NULL; | 294 Node *res = NULL; |
295 jlong bit1 = con & -con; // Extract low bit | 295 jlong bit1 = con & -con; // Extract low bit |
296 if( bit1 == con ) { // Found a power of 2? | 296 if( bit1 == con ) { // Found a power of 2? |
297 res = new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ); | 297 res = new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ); |
298 } else { | 298 } else { |
299 | 299 |
300 // Check for constant with 2 bits set | 300 // Check for constant with 2 bits set |
301 jlong bit2 = con-bit1; | 301 jlong bit2 = con-bit1; |
302 bit2 = bit2 & -bit2; // Extract 2nd bit | 302 bit2 = bit2 & -bit2; // Extract 2nd bit |
303 if( bit2 + bit1 == con ) { // Found all bits in con? | 303 if( bit2 + bit1 == con ) { // Found all bits in con? |
304 Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) ); | 304 Node *n1 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) ); |
305 Node *n2 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) ); | 305 Node *n2 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) ); |
306 res = new (phase->C, 3) AddLNode( n2, n1 ); | 306 res = new (phase->C) AddLNode( n2, n1 ); |
307 | 307 |
308 } else if (is_power_of_2_long(con+1)) { | 308 } else if (is_power_of_2_long(con+1)) { |
309 // Sleezy: power-of-2 -1. Next time be generic. | 309 // Sleezy: power-of-2 -1. Next time be generic. |
310 jlong temp = (jlong) (con + 1); | 310 jlong temp = (jlong) (con + 1); |
311 Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) ); | 311 Node *n1 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) ); |
312 res = new (phase->C, 3) SubLNode( n1, in(1) ); | 312 res = new (phase->C) SubLNode( n1, in(1) ); |
313 } else { | 313 } else { |
314 return MulNode::Ideal(phase, can_reshape); | 314 return MulNode::Ideal(phase, can_reshape); |
315 } | 315 } |
316 } | 316 } |
317 | 317 |
318 if( sign_flip ) { // Need to negate result? | 318 if( sign_flip ) { // Need to negate result? |
319 res = phase->transform(res);// Transform, before making the zero con | 319 res = phase->transform(res);// Transform, before making the zero con |
320 res = new (phase->C, 3) SubLNode(phase->longcon(0),res); | 320 res = new (phase->C) SubLNode(phase->longcon(0),res); |
321 } | 321 } |
322 | 322 |
323 return res; // Return final result | 323 return res; // Return final result |
324 } | 324 } |
325 | 325 |
474 uint lop = load->Opcode(); | 474 uint lop = load->Opcode(); |
475 | 475 |
476 // Masking bits off of a Character? Hi bits are already zero. | 476 // Masking bits off of a Character? Hi bits are already zero. |
477 if( lop == Op_LoadUS && | 477 if( lop == Op_LoadUS && |
478 (mask & 0xFFFF0000) ) // Can we make a smaller mask? | 478 (mask & 0xFFFF0000) ) // Can we make a smaller mask? |
479 return new (phase->C, 3) AndINode(load,phase->intcon(mask&0xFFFF)); | 479 return new (phase->C) AndINode(load,phase->intcon(mask&0xFFFF)); |
480 | 480 |
481 // Masking bits off of a Short? Loading a Character does some masking | 481 // Masking bits off of a Short? Loading a Character does some masking |
482 if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) { | 482 if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) { |
483 Node *ldus = new (phase->C, 3) LoadUSNode(load->in(MemNode::Control), | 483 Node *ldus = new (phase->C) LoadUSNode(load->in(MemNode::Control), |
484 load->in(MemNode::Memory), | 484 load->in(MemNode::Memory), |
485 load->in(MemNode::Address), | 485 load->in(MemNode::Address), |
486 load->adr_type()); | 486 load->adr_type()); |
487 ldus = phase->transform(ldus); | 487 ldus = phase->transform(ldus); |
488 return new (phase->C, 3) AndINode(ldus, phase->intcon(mask & 0xFFFF)); | 488 return new (phase->C) AndINode(ldus, phase->intcon(mask & 0xFFFF)); |
489 } | 489 } |
490 | 490 |
491 // Masking sign bits off of a Byte? Do an unsigned byte load plus | 491 // Masking sign bits off of a Byte? Do an unsigned byte load plus |
492 // an and. | 492 // an and. |
493 if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) { | 493 if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) { |
494 Node* ldub = new (phase->C, 3) LoadUBNode(load->in(MemNode::Control), | 494 Node* ldub = new (phase->C) LoadUBNode(load->in(MemNode::Control), |
495 load->in(MemNode::Memory), | 495 load->in(MemNode::Memory), |
496 load->in(MemNode::Address), | 496 load->in(MemNode::Address), |
497 load->adr_type()); | 497 load->adr_type()); |
498 ldub = phase->transform(ldub); | 498 ldub = phase->transform(ldub); |
499 return new (phase->C, 3) AndINode(ldub, phase->intcon(mask)); | 499 return new (phase->C) AndINode(ldub, phase->intcon(mask)); |
500 } | 500 } |
501 | 501 |
502 // Masking off sign bits? Dont make them! | 502 // Masking off sign bits? Dont make them! |
503 if( lop == Op_RShiftI ) { | 503 if( lop == Op_RShiftI ) { |
504 const TypeInt *t12 = phase->type(load->in(2))->isa_int(); | 504 const TypeInt *t12 = phase->type(load->in(2))->isa_int(); |
508 const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift); | 508 const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift); |
509 // If the AND'ing of the 2 masks has no bits, then only original shifted | 509 // If the AND'ing of the 2 masks has no bits, then only original shifted |
510 // bits survive. NO sign-extension bits survive the maskings. | 510 // bits survive. NO sign-extension bits survive the maskings. |
511 if( (sign_bits_mask & mask) == 0 ) { | 511 if( (sign_bits_mask & mask) == 0 ) { |
512 // Use zero-fill shift instead | 512 // Use zero-fill shift instead |
513 Node *zshift = phase->transform(new (phase->C, 3) URShiftINode(load->in(1),load->in(2))); | 513 Node *zshift = phase->transform(new (phase->C) URShiftINode(load->in(1),load->in(2))); |
514 return new (phase->C, 3) AndINode( zshift, in(2) ); | 514 return new (phase->C) AndINode( zshift, in(2) ); |
515 } | 515 } |
516 } | 516 } |
517 } | 517 } |
518 | 518 |
519 // Check for 'negate/and-1', a pattern emitted when someone asks for | 519 // Check for 'negate/and-1', a pattern emitted when someone asks for |
520 // 'mod 2'. Negate leaves the low order bit unchanged (think: complement | 520 // 'mod 2'. Negate leaves the low order bit unchanged (think: complement |
521 // plus 1) and the mask is of the low order bit. Skip the negate. | 521 // plus 1) and the mask is of the low order bit. Skip the negate. |
522 if( lop == Op_SubI && mask == 1 && load->in(1) && | 522 if( lop == Op_SubI && mask == 1 && load->in(1) && |
523 phase->type(load->in(1)) == TypeInt::ZERO ) | 523 phase->type(load->in(1)) == TypeInt::ZERO ) |
524 return new (phase->C, 3) AndINode( load->in(2), in(2) ); | 524 return new (phase->C) AndINode( load->in(2), in(2) ); |
525 | 525 |
526 return MulNode::Ideal(phase, can_reshape); | 526 return MulNode::Ideal(phase, can_reshape); |
527 } | 527 } |
528 | 528 |
529 //============================================================================= | 529 //============================================================================= |
605 // to an AndINode and commute it with ConvI2LNode because | 605 // to an AndINode and commute it with ConvI2LNode because |
606 // 0xFFFFFFFFL masks the whole integer and we get a sign extension, | 606 // 0xFFFFFFFFL masks the whole integer and we get a sign extension, |
607 // which is wrong. | 607 // which is wrong. |
608 if (op == Op_ConvI2L && in1->in(1)->Opcode() == Op_LoadI && mask == CONST64(0x00000000FFFFFFFF)) { | 608 if (op == Op_ConvI2L && in1->in(1)->Opcode() == Op_LoadI && mask == CONST64(0x00000000FFFFFFFF)) { |
609 Node* load = in1->in(1); | 609 Node* load = in1->in(1); |
610 return new (phase->C, 3) LoadUI2LNode(load->in(MemNode::Control), | 610 return new (phase->C) LoadUI2LNode(load->in(MemNode::Control), |
611 load->in(MemNode::Memory), | 611 load->in(MemNode::Memory), |
612 load->in(MemNode::Address), | 612 load->in(MemNode::Address), |
613 load->adr_type()); | 613 load->adr_type()); |
614 } | 614 } |
615 | 615 |
617 // that fits in 32-bits? Commute them and use an AndINode. Don't | 617 // that fits in 32-bits? Commute them and use an AndINode. Don't |
618 // convert masks which would cause a sign extension of the integer | 618 // convert masks which would cause a sign extension of the integer |
619 // value. This check includes UI2L masks (0x00000000FFFFFFFF) which | 619 // value. This check includes UI2L masks (0x00000000FFFFFFFF) which |
620 // would be optimized away later in Identity. | 620 // would be optimized away later in Identity. |
621 if (op == Op_ConvI2L && (mask & CONST64(0xFFFFFFFF80000000)) == 0) { | 621 if (op == Op_ConvI2L && (mask & CONST64(0xFFFFFFFF80000000)) == 0) { |
622 Node* andi = new (phase->C, 3) AndINode(in1->in(1), phase->intcon(mask)); | 622 Node* andi = new (phase->C) AndINode(in1->in(1), phase->intcon(mask)); |
623 andi = phase->transform(andi); | 623 andi = phase->transform(andi); |
624 return new (phase->C, 2) ConvI2LNode(andi); | 624 return new (phase->C) ConvI2LNode(andi); |
625 } | 625 } |
626 | 626 |
627 // Masking off sign bits? Dont make them! | 627 // Masking off sign bits? Dont make them! |
628 if (op == Op_RShiftL) { | 628 if (op == Op_RShiftL) { |
629 const TypeInt* t12 = phase->type(in1->in(2))->isa_int(); | 629 const TypeInt* t12 = phase->type(in1->in(2))->isa_int(); |
633 const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1); | 633 const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1); |
634 // If the AND'ing of the 2 masks has no bits, then only original shifted | 634 // If the AND'ing of the 2 masks has no bits, then only original shifted |
635 // bits survive. NO sign-extension bits survive the maskings. | 635 // bits survive. NO sign-extension bits survive the maskings. |
636 if( (sign_bits_mask & mask) == 0 ) { | 636 if( (sign_bits_mask & mask) == 0 ) { |
637 // Use zero-fill shift instead | 637 // Use zero-fill shift instead |
638 Node *zshift = phase->transform(new (phase->C, 3) URShiftLNode(in1->in(1), in1->in(2))); | 638 Node *zshift = phase->transform(new (phase->C) URShiftLNode(in1->in(1), in1->in(2))); |
639 return new (phase->C, 3) AndLNode(zshift, in(2)); | 639 return new (phase->C) AndLNode(zshift, in(2)); |
640 } | 640 } |
641 } | 641 } |
642 } | 642 } |
643 | 643 |
644 return MulNode::Ideal(phase, can_reshape); | 644 return MulNode::Ideal(phase, can_reshape); |
672 if( t12 && t12->is_con() ){ // Left input is an add of a con? | 672 if( t12 && t12->is_con() ){ // Left input is an add of a con? |
673 // Transform is legal, but check for profit. Avoid breaking 'i2s' | 673 // Transform is legal, but check for profit. Avoid breaking 'i2s' |
674 // and 'i2b' patterns which typically fold into 'StoreC/StoreB'. | 674 // and 'i2b' patterns which typically fold into 'StoreC/StoreB'. |
675 if( con < 16 ) { | 675 if( con < 16 ) { |
676 // Compute X << con0 | 676 // Compute X << con0 |
677 Node *lsh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(1), in(2) ) ); | 677 Node *lsh = phase->transform( new (phase->C) LShiftINode( add1->in(1), in(2) ) ); |
678 // Compute X<<con0 + (con1<<con0) | 678 // Compute X<<con0 + (con1<<con0) |
679 return new (phase->C, 3) AddINode( lsh, phase->intcon(t12->get_con() << con)); | 679 return new (phase->C) AddINode( lsh, phase->intcon(t12->get_con() << con)); |
680 } | 680 } |
681 } | 681 } |
682 } | 682 } |
683 | 683 |
684 // Check for "(x>>c0)<<c0" which just masks off low bits | 684 // Check for "(x>>c0)<<c0" which just masks off low bits |
685 if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) && | 685 if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) && |
686 add1->in(2) == in(2) ) | 686 add1->in(2) == in(2) ) |
687 // Convert to "(x & -(1<<c0))" | 687 // Convert to "(x & -(1<<c0))" |
688 return new (phase->C, 3) AndINode(add1->in(1),phase->intcon( -(1<<con))); | 688 return new (phase->C) AndINode(add1->in(1),phase->intcon( -(1<<con))); |
689 | 689 |
690 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits | 690 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits |
691 if( add1_op == Op_AndI ) { | 691 if( add1_op == Op_AndI ) { |
692 Node *add2 = add1->in(1); | 692 Node *add2 = add1->in(1); |
693 int add2_op = add2->Opcode(); | 693 int add2_op = add2->Opcode(); |
694 if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) && | 694 if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) && |
695 add2->in(2) == in(2) ) { | 695 add2->in(2) == in(2) ) { |
696 // Convert to "(x & (Y<<c0))" | 696 // Convert to "(x & (Y<<c0))" |
697 Node *y_sh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(2), in(2) ) ); | 697 Node *y_sh = phase->transform( new (phase->C) LShiftINode( add1->in(2), in(2) ) ); |
698 return new (phase->C, 3) AndINode( add2->in(1), y_sh ); | 698 return new (phase->C) AndINode( add2->in(1), y_sh ); |
699 } | 699 } |
700 } | 700 } |
701 | 701 |
702 // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits | 702 // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits |
703 // before shifting them away. | 703 // before shifting them away. |
704 const jint bits_mask = right_n_bits(BitsPerJavaInteger-con); | 704 const jint bits_mask = right_n_bits(BitsPerJavaInteger-con); |
705 if( add1_op == Op_AndI && | 705 if( add1_op == Op_AndI && |
706 phase->type(add1->in(2)) == TypeInt::make( bits_mask ) ) | 706 phase->type(add1->in(2)) == TypeInt::make( bits_mask ) ) |
707 return new (phase->C, 3) LShiftINode( add1->in(1), in(2) ); | 707 return new (phase->C) LShiftINode( add1->in(1), in(2) ); |
708 | 708 |
709 return NULL; | 709 return NULL; |
710 } | 710 } |
711 | 711 |
712 //------------------------------Value------------------------------------------ | 712 //------------------------------Value------------------------------------------ |
782 // Avoid dead data cycles from dead loops | 782 // Avoid dead data cycles from dead loops |
783 assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" ); | 783 assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" ); |
784 const TypeLong *t12 = phase->type(add1->in(2))->isa_long(); | 784 const TypeLong *t12 = phase->type(add1->in(2))->isa_long(); |
785 if( t12 && t12->is_con() ){ // Left input is an add of a con? | 785 if( t12 && t12->is_con() ){ // Left input is an add of a con? |
786 // Compute X << con0 | 786 // Compute X << con0 |
787 Node *lsh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(1), in(2) ) ); | 787 Node *lsh = phase->transform( new (phase->C) LShiftLNode( add1->in(1), in(2) ) ); |
788 // Compute X<<con0 + (con1<<con0) | 788 // Compute X<<con0 + (con1<<con0) |
789 return new (phase->C, 3) AddLNode( lsh, phase->longcon(t12->get_con() << con)); | 789 return new (phase->C) AddLNode( lsh, phase->longcon(t12->get_con() << con)); |
790 } | 790 } |
791 } | 791 } |
792 | 792 |
793 // Check for "(x>>c0)<<c0" which just masks off low bits | 793 // Check for "(x>>c0)<<c0" which just masks off low bits |
794 if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) && | 794 if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) && |
795 add1->in(2) == in(2) ) | 795 add1->in(2) == in(2) ) |
796 // Convert to "(x & -(1<<c0))" | 796 // Convert to "(x & -(1<<c0))" |
797 return new (phase->C, 3) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con))); | 797 return new (phase->C) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con))); |
798 | 798 |
799 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits | 799 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits |
800 if( add1_op == Op_AndL ) { | 800 if( add1_op == Op_AndL ) { |
801 Node *add2 = add1->in(1); | 801 Node *add2 = add1->in(1); |
802 int add2_op = add2->Opcode(); | 802 int add2_op = add2->Opcode(); |
803 if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) && | 803 if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) && |
804 add2->in(2) == in(2) ) { | 804 add2->in(2) == in(2) ) { |
805 // Convert to "(x & (Y<<c0))" | 805 // Convert to "(x & (Y<<c0))" |
806 Node *y_sh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(2), in(2) ) ); | 806 Node *y_sh = phase->transform( new (phase->C) LShiftLNode( add1->in(2), in(2) ) ); |
807 return new (phase->C, 3) AndLNode( add2->in(1), y_sh ); | 807 return new (phase->C) AndLNode( add2->in(1), y_sh ); |
808 } | 808 } |
809 } | 809 } |
810 | 810 |
811 // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits | 811 // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits |
812 // before shifting them away. | 812 // before shifting them away. |
813 const jlong bits_mask = ((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) - CONST64(1); | 813 const jlong bits_mask = ((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) - CONST64(1); |
814 if( add1_op == Op_AndL && | 814 if( add1_op == Op_AndL && |
815 phase->type(add1->in(2)) == TypeLong::make( bits_mask ) ) | 815 phase->type(add1->in(2)) == TypeLong::make( bits_mask ) ) |
816 return new (phase->C, 3) LShiftLNode( add1->in(1), in(2) ); | 816 return new (phase->C) LShiftLNode( add1->in(1), in(2) ); |
817 | 817 |
818 return NULL; | 818 return NULL; |
819 } | 819 } |
820 | 820 |
821 //------------------------------Value------------------------------------------ | 821 //------------------------------Value------------------------------------------ |
913 (t3 = phase->type(mask->in(2))->isa_int()) && | 913 (t3 = phase->type(mask->in(2))->isa_int()) && |
914 t3->is_con() ) { | 914 t3->is_con() ) { |
915 Node *x = mask->in(1); | 915 Node *x = mask->in(1); |
916 jint maskbits = t3->get_con(); | 916 jint maskbits = t3->get_con(); |
917 // Convert to "(x >> shift) & (mask >> shift)" | 917 // Convert to "(x >> shift) & (mask >> shift)" |
918 Node *shr_nomask = phase->transform( new (phase->C, 3) RShiftINode(mask->in(1), in(2)) ); | 918 Node *shr_nomask = phase->transform( new (phase->C) RShiftINode(mask->in(1), in(2)) ); |
919 return new (phase->C, 3) AndINode(shr_nomask, phase->intcon( maskbits >> shift)); | 919 return new (phase->C) AndINode(shr_nomask, phase->intcon( maskbits >> shift)); |
920 } | 920 } |
921 | 921 |
922 // Check for "(short[i] <<16)>>16" which simply sign-extends | 922 // Check for "(short[i] <<16)>>16" which simply sign-extends |
923 const Node *shl = in(1); | 923 const Node *shl = in(1); |
924 if( shl->Opcode() != Op_LShiftI ) return NULL; | 924 if( shl->Opcode() != Op_LShiftI ) return NULL; |
937 set_req(2, phase->intcon(0)); | 937 set_req(2, phase->intcon(0)); |
938 return this; | 938 return this; |
939 } | 939 } |
940 else if( ld->Opcode() == Op_LoadUS ) | 940 else if( ld->Opcode() == Op_LoadUS ) |
941 // Replace zero-extension-load with sign-extension-load | 941 // Replace zero-extension-load with sign-extension-load |
942 return new (phase->C, 3) LoadSNode( ld->in(MemNode::Control), | 942 return new (phase->C) LoadSNode( ld->in(MemNode::Control), |
943 ld->in(MemNode::Memory), | 943 ld->in(MemNode::Memory), |
944 ld->in(MemNode::Address), | 944 ld->in(MemNode::Address), |
945 ld->adr_type()); | 945 ld->adr_type()); |
946 } | 946 } |
947 | 947 |
1122 if( t12 && t12->is_con() ) { // Right input is a constant | 1122 if( t12 && t12->is_con() ) { // Right input is a constant |
1123 assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" ); | 1123 assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" ); |
1124 const int con2 = t12->get_con() & 31; // Shift count is always masked | 1124 const int con2 = t12->get_con() & 31; // Shift count is always masked |
1125 const int con3 = con+con2; | 1125 const int con3 = con+con2; |
1126 if( con3 < 32 ) // Only merge shifts if total is < 32 | 1126 if( con3 < 32 ) // Only merge shifts if total is < 32 |
1127 return new (phase->C, 3) URShiftINode( in(1)->in(1), phase->intcon(con3) ); | 1127 return new (phase->C) URShiftINode( in(1)->in(1), phase->intcon(con3) ); |
1128 } | 1128 } |
1129 } | 1129 } |
1130 | 1130 |
1131 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z | 1131 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z |
1132 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z". | 1132 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z". |
1135 Node *add = in(1); | 1135 Node *add = in(1); |
1136 if( in1_op == Op_AddI ) { | 1136 if( in1_op == Op_AddI ) { |
1137 Node *lshl = add->in(1); | 1137 Node *lshl = add->in(1); |
1138 if( lshl->Opcode() == Op_LShiftI && | 1138 if( lshl->Opcode() == Op_LShiftI && |
1139 phase->type(lshl->in(2)) == t2 ) { | 1139 phase->type(lshl->in(2)) == t2 ) { |
1140 Node *y_z = phase->transform( new (phase->C, 3) URShiftINode(add->in(2),in(2)) ); | 1140 Node *y_z = phase->transform( new (phase->C) URShiftINode(add->in(2),in(2)) ); |
1141 Node *sum = phase->transform( new (phase->C, 3) AddINode( lshl->in(1), y_z ) ); | 1141 Node *sum = phase->transform( new (phase->C) AddINode( lshl->in(1), y_z ) ); |
1142 return new (phase->C, 3) AndINode( sum, phase->intcon(mask) ); | 1142 return new (phase->C) AndINode( sum, phase->intcon(mask) ); |
1143 } | 1143 } |
1144 } | 1144 } |
1145 | 1145 |
1146 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z) | 1146 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z) |
1147 // This shortens the mask. Also, if we are extracting a high byte and | 1147 // This shortens the mask. Also, if we are extracting a high byte and |
1150 if( in1_op == Op_AndI ) { | 1150 if( in1_op == Op_AndI ) { |
1151 const TypeInt *t3 = phase->type( andi->in(2) )->isa_int(); | 1151 const TypeInt *t3 = phase->type( andi->in(2) )->isa_int(); |
1152 if( t3 && t3->is_con() ) { // Right input is a constant | 1152 if( t3 && t3->is_con() ) { // Right input is a constant |
1153 jint mask2 = t3->get_con(); | 1153 jint mask2 = t3->get_con(); |
1154 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help) | 1154 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help) |
1155 Node *newshr = phase->transform( new (phase->C, 3) URShiftINode(andi->in(1), in(2)) ); | 1155 Node *newshr = phase->transform( new (phase->C) URShiftINode(andi->in(1), in(2)) ); |
1156 return new (phase->C, 3) AndINode(newshr, phase->intcon(mask2)); | 1156 return new (phase->C) AndINode(newshr, phase->intcon(mask2)); |
1157 // The negative values are easier to materialize than positive ones. | 1157 // The negative values are easier to materialize than positive ones. |
1158 // A typical case from address arithmetic is ((x & ~15) >> 4). | 1158 // A typical case from address arithmetic is ((x & ~15) >> 4). |
1159 // It's better to change that to ((x >> 4) & ~0) versus | 1159 // It's better to change that to ((x >> 4) & ~0) versus |
1160 // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64. | 1160 // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64. |
1161 } | 1161 } |
1163 | 1163 |
1164 // Check for "(X << z ) >>> z" which simply zero-extends | 1164 // Check for "(X << z ) >>> z" which simply zero-extends |
1165 Node *shl = in(1); | 1165 Node *shl = in(1); |
1166 if( in1_op == Op_LShiftI && | 1166 if( in1_op == Op_LShiftI && |
1167 phase->type(shl->in(2)) == t2 ) | 1167 phase->type(shl->in(2)) == t2 ) |
1168 return new (phase->C, 3) AndINode( shl->in(1), phase->intcon(mask) ); | 1168 return new (phase->C) AndINode( shl->in(1), phase->intcon(mask) ); |
1169 | 1169 |
1170 return NULL; | 1170 return NULL; |
1171 } | 1171 } |
1172 | 1172 |
1173 //------------------------------Value------------------------------------------ | 1173 //------------------------------Value------------------------------------------ |
1268 Node *add = in(1); | 1268 Node *add = in(1); |
1269 if( add->Opcode() == Op_AddL ) { | 1269 if( add->Opcode() == Op_AddL ) { |
1270 Node *lshl = add->in(1); | 1270 Node *lshl = add->in(1); |
1271 if( lshl->Opcode() == Op_LShiftL && | 1271 if( lshl->Opcode() == Op_LShiftL && |
1272 phase->type(lshl->in(2)) == t2 ) { | 1272 phase->type(lshl->in(2)) == t2 ) { |
1273 Node *y_z = phase->transform( new (phase->C, 3) URShiftLNode(add->in(2),in(2)) ); | 1273 Node *y_z = phase->transform( new (phase->C) URShiftLNode(add->in(2),in(2)) ); |
1274 Node *sum = phase->transform( new (phase->C, 3) AddLNode( lshl->in(1), y_z ) ); | 1274 Node *sum = phase->transform( new (phase->C) AddLNode( lshl->in(1), y_z ) ); |
1275 return new (phase->C, 3) AndLNode( sum, phase->longcon(mask) ); | 1275 return new (phase->C) AndLNode( sum, phase->longcon(mask) ); |
1276 } | 1276 } |
1277 } | 1277 } |
1278 | 1278 |
1279 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z) | 1279 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z) |
1280 // This shortens the mask. Also, if we are extracting a high byte and | 1280 // This shortens the mask. Also, if we are extracting a high byte and |
1283 if( andi->Opcode() == Op_AndL ) { | 1283 if( andi->Opcode() == Op_AndL ) { |
1284 const TypeLong *t3 = phase->type( andi->in(2) )->isa_long(); | 1284 const TypeLong *t3 = phase->type( andi->in(2) )->isa_long(); |
1285 if( t3 && t3->is_con() ) { // Right input is a constant | 1285 if( t3 && t3->is_con() ) { // Right input is a constant |
1286 jlong mask2 = t3->get_con(); | 1286 jlong mask2 = t3->get_con(); |
1287 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help) | 1287 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help) |
1288 Node *newshr = phase->transform( new (phase->C, 3) URShiftLNode(andi->in(1), in(2)) ); | 1288 Node *newshr = phase->transform( new (phase->C) URShiftLNode(andi->in(1), in(2)) ); |
1289 return new (phase->C, 3) AndLNode(newshr, phase->longcon(mask2)); | 1289 return new (phase->C) AndLNode(newshr, phase->longcon(mask2)); |
1290 } | 1290 } |
1291 } | 1291 } |
1292 | 1292 |
1293 // Check for "(X << z ) >>> z" which simply zero-extends | 1293 // Check for "(X << z ) >>> z" which simply zero-extends |
1294 Node *shl = in(1); | 1294 Node *shl = in(1); |
1295 if( shl->Opcode() == Op_LShiftL && | 1295 if( shl->Opcode() == Op_LShiftL && |
1296 phase->type(shl->in(2)) == t2 ) | 1296 phase->type(shl->in(2)) == t2 ) |
1297 return new (phase->C, 3) AndLNode( shl->in(1), phase->longcon(mask) ); | 1297 return new (phase->C) AndLNode( shl->in(1), phase->longcon(mask) ); |
1298 | 1298 |
1299 return NULL; | 1299 return NULL; |
1300 } | 1300 } |
1301 | 1301 |
1302 //------------------------------Value------------------------------------------ | 1302 //------------------------------Value------------------------------------------ |