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comparison src/cpu/sparc/vm/sparc.ad @ 1579:e9ff18c4ace7

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Merge
author jrose
date Wed, 02 Jun 2010 22:45:42 -0700
parents c18cbe5936b8 3657cb01ffc5
children 3e8fbc61cee8
comparison
equal deleted inserted replaced
1562:dfe27f03244a 1579:e9ff18c4ace7
532 // from the start of the call to the point where the return address 532 // from the start of the call to the point where the return address
533 // will point. 533 // will point.
534 // The "return address" is the address of the call instruction, plus 8. 534 // The "return address" is the address of the call instruction, plus 8.
535 535
536 int MachCallStaticJavaNode::ret_addr_offset() { 536 int MachCallStaticJavaNode::ret_addr_offset() {
537 return NativeCall::instruction_size; // call; delay slot 537 int offset = NativeCall::instruction_size; // call; delay slot
538 if (_method_handle_invoke)
539 offset += 4; // restore SP
540 return offset;
538 } 541 }
539 542
540 int MachCallDynamicJavaNode::ret_addr_offset() { 543 int MachCallDynamicJavaNode::ret_addr_offset() {
541 int vtable_index = this->_vtable_index; 544 int vtable_index = this->_vtable_index;
542 if (vtable_index < 0) { 545 if (vtable_index < 0) {
816 !(n->ideal_Opcode()==Op_LoadD_unaligned && ld_op==Op_LoadF) && 819 !(n->ideal_Opcode()==Op_LoadD_unaligned && ld_op==Op_LoadF) &&
817 !(n->ideal_Opcode()==Op_ConvI2F && ld_op==Op_LoadF) && 820 !(n->ideal_Opcode()==Op_ConvI2F && ld_op==Op_LoadF) &&
818 !(n->ideal_Opcode()==Op_ConvI2D && ld_op==Op_LoadF) && 821 !(n->ideal_Opcode()==Op_ConvI2D && ld_op==Op_LoadF) &&
819 !(n->ideal_Opcode()==Op_PrefetchRead && ld_op==Op_LoadI) && 822 !(n->ideal_Opcode()==Op_PrefetchRead && ld_op==Op_LoadI) &&
820 !(n->ideal_Opcode()==Op_PrefetchWrite && ld_op==Op_LoadI) && 823 !(n->ideal_Opcode()==Op_PrefetchWrite && ld_op==Op_LoadI) &&
824 !(n->ideal_Opcode()==Op_Load2I && ld_op==Op_LoadD) &&
825 !(n->ideal_Opcode()==Op_Load4C && ld_op==Op_LoadD) &&
826 !(n->ideal_Opcode()==Op_Load4S && ld_op==Op_LoadD) &&
827 !(n->ideal_Opcode()==Op_Load8B && ld_op==Op_LoadD) &&
821 !(n->rule() == loadUB_rule)) { 828 !(n->rule() == loadUB_rule)) {
822 verify_oops_warning(n, n->ideal_Opcode(), ld_op); 829 verify_oops_warning(n, n->ideal_Opcode(), ld_op);
823 } 830 }
824 } else if (st_op) { 831 } else if (st_op) {
825 // a Store 832 // a Store
827 if (!(n->ideal_Opcode()==st_op) && // Following are special cases 834 if (!(n->ideal_Opcode()==st_op) && // Following are special cases
828 !(n->ideal_Opcode()==Op_StoreCM && st_op==Op_StoreB) && 835 !(n->ideal_Opcode()==Op_StoreCM && st_op==Op_StoreB) &&
829 !(n->ideal_Opcode()==Op_StoreI && st_op==Op_StoreF) && 836 !(n->ideal_Opcode()==Op_StoreI && st_op==Op_StoreF) &&
830 !(n->ideal_Opcode()==Op_StoreF && st_op==Op_StoreI) && 837 !(n->ideal_Opcode()==Op_StoreF && st_op==Op_StoreI) &&
831 !(n->ideal_Opcode()==Op_StoreL && st_op==Op_StoreI) && 838 !(n->ideal_Opcode()==Op_StoreL && st_op==Op_StoreI) &&
839 !(n->ideal_Opcode()==Op_Store2I && st_op==Op_StoreD) &&
840 !(n->ideal_Opcode()==Op_Store4C && st_op==Op_StoreD) &&
841 !(n->ideal_Opcode()==Op_Store8B && st_op==Op_StoreD) &&
832 !(n->ideal_Opcode()==Op_StoreD && st_op==Op_StoreI && n->rule() == storeD0_rule)) { 842 !(n->ideal_Opcode()==Op_StoreD && st_op==Op_StoreI && n->rule() == storeD0_rule)) {
833 verify_oops_warning(n, n->ideal_Opcode(), st_op); 843 verify_oops_warning(n, n->ideal_Opcode(), st_op);
834 } 844 }
835 } 845 }
836 846
1748 // Should the Matcher clone shifts on addressing modes, expecting them to 1758 // Should the Matcher clone shifts on addressing modes, expecting them to
1749 // be subsumed into complex addressing expressions or compute them into 1759 // be subsumed into complex addressing expressions or compute them into
1750 // registers? True for Intel but false for most RISCs 1760 // registers? True for Intel but false for most RISCs
1751 const bool Matcher::clone_shift_expressions = false; 1761 const bool Matcher::clone_shift_expressions = false;
1752 1762
1763 bool Matcher::narrow_oop_use_complex_address() {
1764 NOT_LP64(ShouldNotCallThis());
1765 assert(UseCompressedOops, "only for compressed oops code");
1766 return false;
1767 }
1768
1753 // Is it better to copy float constants, or load them directly from memory? 1769 // Is it better to copy float constants, or load them directly from memory?
1754 // Intel can load a float constant from a direct address, requiring no 1770 // Intel can load a float constant from a direct address, requiring no
1755 // extra registers. Most RISCs will have to materialize an address into a 1771 // extra registers. Most RISCs will have to materialize an address into a
1756 // register first, so they would do better to copy the constant from stack. 1772 // register first, so they would do better to copy the constant from stack.
1757 const bool Matcher::rematerialize_float_constants = false; 1773 const bool Matcher::rematerialize_float_constants = false;
1856 ShouldNotReachHere(); 1872 ShouldNotReachHere();
1857 return RegMask(); 1873 return RegMask();
1858 } 1874 }
1859 1875
1860 const RegMask Matcher::method_handle_invoke_SP_save_mask() { 1876 const RegMask Matcher::method_handle_invoke_SP_save_mask() {
1861 return RegMask(); 1877 return L7_REGP_mask;
1862 } 1878 }
1863 1879
1864 %} 1880 %}
1865 1881
1866 1882
2437 enc_class Java_To_Runtime (method meth) %{ // CALL Java_To_Runtime 2453 enc_class Java_To_Runtime (method meth) %{ // CALL Java_To_Runtime
2438 // CALL directly to the runtime 2454 // CALL directly to the runtime
2439 // The user of this is responsible for ensuring that R_L7 is empty (killed). 2455 // The user of this is responsible for ensuring that R_L7 is empty (killed).
2440 emit_call_reloc(cbuf, $meth$$method, relocInfo::runtime_call_type, 2456 emit_call_reloc(cbuf, $meth$$method, relocInfo::runtime_call_type,
2441 /*preserve_g2=*/true, /*force far call*/true); 2457 /*preserve_g2=*/true, /*force far call*/true);
2458 %}
2459
2460 enc_class preserve_SP %{
2461 MacroAssembler _masm(&cbuf);
2462 __ mov(SP, L7_mh_SP_save);
2463 %}
2464
2465 enc_class restore_SP %{
2466 MacroAssembler _masm(&cbuf);
2467 __ mov(L7_mh_SP_save, SP);
2442 %} 2468 %}
2443 2469
2444 enc_class Java_Static_Call (method meth) %{ // JAVA STATIC CALL 2470 enc_class Java_Static_Call (method meth) %{ // JAVA STATIC CALL
2445 // CALL to fixup routine. Fixup routine uses ScopeDesc info to determine 2471 // CALL to fixup routine. Fixup routine uses ScopeDesc info to determine
2446 // who we intended to call. 2472 // who we intended to call.
9211 // ============================================================================ 9237 // ============================================================================
9212 // Call Instructions 9238 // Call Instructions
9213 // Call Java Static Instruction 9239 // Call Java Static Instruction
9214 instruct CallStaticJavaDirect( method meth ) %{ 9240 instruct CallStaticJavaDirect( method meth ) %{
9215 match(CallStaticJava); 9241 match(CallStaticJava);
9242 predicate(! ((CallStaticJavaNode*)n)->is_method_handle_invoke());
9216 effect(USE meth); 9243 effect(USE meth);
9217 9244
9218 size(8); 9245 size(8);
9219 ins_cost(CALL_COST); 9246 ins_cost(CALL_COST);
9220 format %{ "CALL,static ; NOP ==> " %} 9247 format %{ "CALL,static ; NOP ==> " %}
9221 ins_encode( Java_Static_Call( meth ), call_epilog ); 9248 ins_encode( Java_Static_Call( meth ), call_epilog );
9249 ins_pc_relative(1);
9250 ins_pipe(simple_call);
9251 %}
9252
9253 // Call Java Static Instruction (method handle version)
9254 instruct CallStaticJavaHandle(method meth, l7RegP l7_mh_SP_save) %{
9255 match(CallStaticJava);
9256 predicate(((CallStaticJavaNode*)n)->is_method_handle_invoke());
9257 effect(USE meth, KILL l7_mh_SP_save);
9258
9259 size(8);
9260 ins_cost(CALL_COST);
9261 format %{ "CALL,static/MethodHandle" %}
9262 ins_encode(preserve_SP, Java_Static_Call(meth), restore_SP, call_epilog);
9222 ins_pc_relative(1); 9263 ins_pc_relative(1);
9223 ins_pipe(simple_call); 9264 ins_pipe(simple_call);
9224 %} 9265 %}
9225 9266
9226 // Call Java Dynamic Instruction 9267 // Call Java Dynamic Instruction