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comparison src/share/vm/opto/matcher.cpp @ 1730:f55c4f82ab9d

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6978249: spill between cpu and fpu registers when those moves are fast Reviewed-by: kvn
author never
date Thu, 19 Aug 2010 14:51:47 -0700
parents e9ff18c4ace7
children f95d63e2154a
comparison
equal deleted inserted replaced
1729:13b87063b4d8 1730:f55c4f82ab9d
453 idealreg2spillmask[Op_RegF]->OR(C->FIRST_STACK_mask()); 453 idealreg2spillmask[Op_RegF]->OR(C->FIRST_STACK_mask());
454 *idealreg2spillmask[Op_RegD] = *idealreg2regmask[Op_RegD]; 454 *idealreg2spillmask[Op_RegD] = *idealreg2regmask[Op_RegD];
455 idealreg2spillmask[Op_RegD]->OR(C->FIRST_STACK_mask()); 455 idealreg2spillmask[Op_RegD]->OR(C->FIRST_STACK_mask());
456 *idealreg2spillmask[Op_RegP] = *idealreg2regmask[Op_RegP]; 456 *idealreg2spillmask[Op_RegP] = *idealreg2regmask[Op_RegP];
457 idealreg2spillmask[Op_RegP]->OR(C->FIRST_STACK_mask()); 457 idealreg2spillmask[Op_RegP]->OR(C->FIRST_STACK_mask());
458
459 if (UseFPUForSpilling) {
460 // This mask logic assumes that the spill operations are
461 // symmetric and that the registers involved are the same size.
462 // On sparc for instance we may have to use 64 bit moves will
463 // kill 2 registers when used with F0-F31.
464 idealreg2spillmask[Op_RegI]->OR(*idealreg2regmask[Op_RegF]);
465 idealreg2spillmask[Op_RegF]->OR(*idealreg2regmask[Op_RegI]);
466 #ifdef _LP64
467 idealreg2spillmask[Op_RegN]->OR(*idealreg2regmask[Op_RegF]);
468 idealreg2spillmask[Op_RegL]->OR(*idealreg2regmask[Op_RegD]);
469 idealreg2spillmask[Op_RegD]->OR(*idealreg2regmask[Op_RegL]);
470 idealreg2spillmask[Op_RegP]->OR(*idealreg2regmask[Op_RegD]);
471 #else
472 idealreg2spillmask[Op_RegP]->OR(*idealreg2regmask[Op_RegF]);
473 #endif
474 }
458 475
459 // Make up debug masks. Any spill slot plus callee-save registers. 476 // Make up debug masks. Any spill slot plus callee-save registers.
460 // Caller-save registers are assumed to be trashable by the various 477 // Caller-save registers are assumed to be trashable by the various
461 // inline-cache fixup routines. 478 // inline-cache fixup routines.
462 *idealreg2debugmask [Op_RegN]= *idealreg2spillmask[Op_RegN]; 479 *idealreg2debugmask [Op_RegN]= *idealreg2spillmask[Op_RegN];