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diff src/cpu/x86/vm/c1_LIRGenerator_x86.cpp @ 2089:037c727f35fb

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7009231: C1: Incorrect CAS code for longs on SPARC 32bit Summary: Fix CAS of longs on SPARC 32bit and cmove on SPARC 64bit. Reviewed-by: kvn
author iveresov
date Mon, 27 Dec 2010 21:51:31 -0800
parents 0cb042fd2d4b
children f966c66b5463
line wrap: on
line diff
--- a/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp	Wed Dec 22 02:02:53 2010 -0800
+++ b/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp	Mon Dec 27 21:51:31 2010 -0800
@@ -741,7 +741,7 @@
 
   // generate conditional move of boolean result
   LIR_Opr result = rlock_result(x);
-  __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
+  __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result, T_LONG);
 }
 
 
@@ -810,7 +810,8 @@
 
   // generate conditional move of boolean result
   LIR_Opr result = rlock_result(x);
-  __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
+  __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
+           result, as_BasicType(type));
   if (type == objectType) {   // Write-barrier needed for Object fields.
     // Seems to be precise
     post_barrier(addr, val.result());