Mercurial > hg > truffle
diff src/cpu/x86/vm/assembler_x86.cpp @ 2044:06f017f7daa7
Merge.
author | Thomas Wuerthinger <wuerthinger@ssw.jku.at> |
---|---|
date | Fri, 07 Jan 2011 18:18:08 +0100 |
parents | 2d26b0046e0d 4de5f4101cfd |
children | 91fe28b03d6a |
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--- a/src/cpu/x86/vm/assembler_x86.cpp Wed Dec 29 20:06:41 2010 +0100 +++ b/src/cpu/x86/vm/assembler_x86.cpp Fri Jan 07 18:18:08 2011 +0100 @@ -22,8 +22,24 @@ * */ -#include "incls/_precompiled.incl" -#include "incls/_assembler_x86.cpp.incl" +#include "precompiled.hpp" +#include "assembler_x86.inline.hpp" +#include "gc_interface/collectedHeap.inline.hpp" +#include "interpreter/interpreter.hpp" +#include "memory/cardTableModRefBS.hpp" +#include "memory/resourceArea.hpp" +#include "prims/methodHandles.hpp" +#include "runtime/biasedLocking.hpp" +#include "runtime/interfaceSupport.hpp" +#include "runtime/objectMonitor.hpp" +#include "runtime/os.hpp" +#include "runtime/sharedRuntime.hpp" +#include "runtime/stubRoutines.hpp" +#ifndef SERIALGC +#include "gc_implementation/g1/g1CollectedHeap.inline.hpp" +#include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" +#include "gc_implementation/g1/heapRegion.hpp" +#endif // Implementation of AddressLiteral @@ -2633,6 +2649,37 @@ emit_byte(0xC0 | encode); } +void Assembler::sqrtsd(XMMRegister dst, Address src) { + NOT_LP64(assert(VM_Version::supports_sse2(), "")); + InstructionMark im(this); + emit_byte(0xF2); + prefix(src, dst); + emit_byte(0x0F); + emit_byte(0x51); + emit_operand(dst, src); +} + +void Assembler::sqrtss(XMMRegister dst, XMMRegister src) { + // HMM Table D-1 says sse2 + // NOT_LP64(assert(VM_Version::supports_sse(), "")); + NOT_LP64(assert(VM_Version::supports_sse2(), "")); + emit_byte(0xF3); + int encode = prefix_and_encode(dst->encoding(), src->encoding()); + emit_byte(0x0F); + emit_byte(0x51); + emit_byte(0xC0 | encode); +} + +void Assembler::sqrtss(XMMRegister dst, Address src) { + NOT_LP64(assert(VM_Version::supports_sse2(), "")); + InstructionMark im(this); + emit_byte(0xF3); + prefix(src, dst); + emit_byte(0x0F); + emit_byte(0x51); + emit_operand(dst, src); +} + void Assembler::stmxcsr( Address dst) { NOT_LP64(assert(VM_Version::supports_sse(), "")); InstructionMark im(this); @@ -4342,16 +4389,6 @@ emit_byte(0xE8 | encode); } -void Assembler::sqrtsd(XMMRegister dst, Address src) { - NOT_LP64(assert(VM_Version::supports_sse2(), "")); - InstructionMark im(this); - emit_byte(0xF2); - prefix(src, dst); - emit_byte(0x0F); - emit_byte(0x51); - emit_operand(dst, src); -} - void Assembler::subq(Address dst, int32_t imm32) { InstructionMark im(this); prefixq(dst); @@ -4913,10 +4950,6 @@ } -void MacroAssembler::movsd(XMMRegister dst, AddressLiteral src) { - movsd(dst, as_Address(src)); -} - void MacroAssembler::pop_callee_saved_registers() { pop(rcx); pop(rdx); @@ -5523,8 +5556,7 @@ } void MacroAssembler::warn(const char* msg) { - push(r12); - movq(r12, rsp); + push(rsp); andq(rsp, -16); // align stack as required by push_CPU_state and call push_CPU_state(); // keeps alignment at 16 bytes @@ -5532,9 +5564,7 @@ mov64(rax, 0); call_VM_leaf(CAST_FROM_FN_PTR(address, warning), c_rarg0); pop_CPU_state(); - - movq(rsp, r12); - pop(r12); + pop(rsp); } #ifndef PRODUCT @@ -5846,6 +5876,10 @@ // debugging support assert(number_of_arguments >= 0 , "cannot have negative number of arguments"); LP64_ONLY(assert(java_thread == r15_thread, "unexpected register")); +#ifdef ASSERT + LP64_ONLY(if (UseCompressedOops) verify_heapbase("call_VM_base");) +#endif // ASSERT + assert(java_thread != oop_result , "cannot use the same register for java_thread & oop_result"); assert(java_thread != last_java_sp, "cannot use the same register for java_thread & last_java_sp");