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diff src/cpu/x86/vm/assembler_x86.cpp @ 3854:1af104d6cf99

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7079329: Adjust allocation prefetching for T4 Summary: on T4 2 BIS instructions should be issued to prefetch 64 bytes Reviewed-by: iveresov, phh, twisti
author kvn
date Tue, 16 Aug 2011 16:59:46 -0700
parents 95134e034042
children 381bf869f784
line wrap: on
line diff
--- a/src/cpu/x86/vm/assembler_x86.cpp	Tue Aug 16 11:53:57 2011 -0700
+++ b/src/cpu/x86/vm/assembler_x86.cpp	Tue Aug 16 16:59:46 2011 -0700
@@ -2315,7 +2315,7 @@
 }
 
 void Assembler::prefetchr(Address src) {
-  NOT_LP64(assert(VM_Version::supports_3dnow_prefetch(), "must support"));
+  assert(VM_Version::supports_3dnow_prefetch(), "must support");
   InstructionMark im(this);
   prefetch_prefix(src);
   emit_byte(0x0D);
@@ -2347,7 +2347,7 @@
 }
 
 void Assembler::prefetchw(Address src) {
-  NOT_LP64(assert(VM_Version::supports_3dnow_prefetch(), "must support"));
+  assert(VM_Version::supports_3dnow_prefetch(), "must support");
   InstructionMark im(this);
   prefetch_prefix(src);
   emit_byte(0x0D);