Mercurial > hg > truffle
diff src/os_cpu/solaris_x86/vm/os_solaris_x86.cpp @ 1907:1e9a9d2e6509
6970683: improvements to hs_err output
Reviewed-by: kvn, jrose, dholmes, coleenp
author | never |
---|---|
date | Thu, 21 Oct 2010 11:55:10 -0700 |
parents | 126ea7725993 |
children | f95d63e2154a |
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--- a/src/os_cpu/solaris_x86/vm/os_solaris_x86.cpp Wed Oct 20 13:18:17 2010 -0700 +++ b/src/os_cpu/solaris_x86/vm/os_solaris_x86.cpp Thu Oct 21 11:55:10 2010 -0700 @@ -719,11 +719,6 @@ ucontext_t *uc = (ucontext_t*)context; st->print_cr("Registers:"); - - // this is horrendously verbose but the layout of the registers in the - // context does not match how we defined our abstract Register set, so - // we can't just iterate through the gregs area - #ifdef AMD64 st->print( "RAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RAX]); st->print(", RBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RBX]); @@ -735,8 +730,8 @@ st->print(", RSI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RSI]); st->print(", RDI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RDI]); st->cr(); - st->print( "R8=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R8]); - st->print(", R9=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R9]); + st->print( "R8 =" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R8]); + st->print(", R9 =" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R9]); st->print(", R10=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R10]); st->print(", R11=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R11]); st->cr(); @@ -747,63 +742,6 @@ st->cr(); st->print( "RIP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RIP]); st->print(", RFLAGS=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RFL]); - - st->cr(); - st->cr(); - - st->print_cr("Register to memory mapping:"); - st->cr(); - - // this is only for the "general purpose" registers - - st->print_cr("RAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RAX]); - print_location(st, uc->uc_mcontext.gregs[REG_RAX]); - st->cr(); - st->print_cr("RBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RBX]); - print_location(st, uc->uc_mcontext.gregs[REG_RBX]); - st->cr(); - st->print_cr("RCX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RCX]); - print_location(st, uc->uc_mcontext.gregs[REG_RCX]); - st->cr(); - st->print_cr("RDX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RDX]); - print_location(st, uc->uc_mcontext.gregs[REG_RDX]); - st->cr(); - st->print_cr("RSP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RSP]); - print_location(st, uc->uc_mcontext.gregs[REG_RSP]); - st->cr(); - st->print_cr("RBP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RBP]); - print_location(st, uc->uc_mcontext.gregs[REG_RSP]); - st->cr(); - st->print_cr("RSI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RSI]); - print_location(st, uc->uc_mcontext.gregs[REG_RSI]); - st->cr(); - st->print_cr("RDI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RDI]); - print_location(st, uc->uc_mcontext.gregs[REG_RDI]); - st->cr(); - st->print_cr("R8 =" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R8]); - print_location(st, uc->uc_mcontext.gregs[REG_R8]); - st->cr(); - st->print_cr("R9 =" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R9]); - print_location(st, uc->uc_mcontext.gregs[REG_R9]); - st->cr(); - st->print_cr("R10=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R10]); - print_location(st, uc->uc_mcontext.gregs[REG_R10]); - st->cr(); - st->print_cr("R11=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R11]); - print_location(st, uc->uc_mcontext.gregs[REG_R11]); - st->cr(); - st->print_cr("R12=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R12]); - print_location(st, uc->uc_mcontext.gregs[REG_R12]); - st->cr(); - st->print_cr("R13=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R13]); - print_location(st, uc->uc_mcontext.gregs[REG_R13]); - st->cr(); - st->print_cr("R14=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R14]); - print_location(st, uc->uc_mcontext.gregs[REG_R14]); - st->cr(); - st->print_cr("R15=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R15]); - print_location(st, uc->uc_mcontext.gregs[REG_R15]); - #else st->print( "EAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EAX]); st->print(", EBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EBX]); @@ -817,39 +755,6 @@ st->cr(); st->print( "EIP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EIP]); st->print(", EFLAGS=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EFL]); - - st->cr(); - st->cr(); - - st->print_cr("Register to memory mapping:"); - st->cr(); - - // this is only for the "general purpose" registers - - st->print_cr("EAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EAX]); - print_location(st, uc->uc_mcontext.gregs[EAX]); - st->cr(); - st->print_cr("EBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EBX]); - print_location(st, uc->uc_mcontext.gregs[EBX]); - st->cr(); - st->print_cr("ECX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[ECX]); - print_location(st, uc->uc_mcontext.gregs[ECX]); - st->cr(); - st->print_cr("EDX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EDX]); - print_location(st, uc->uc_mcontext.gregs[EDX]); - st->cr(); - st->print_cr("ESP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[UESP]); - print_location(st, uc->uc_mcontext.gregs[UESP]); - st->cr(); - st->print_cr("EBP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EBP]); - print_location(st, uc->uc_mcontext.gregs[EBP]); - st->cr(); - st->print_cr("ESI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[ESI]); - print_location(st, uc->uc_mcontext.gregs[ESI]); - st->cr(); - st->print_cr("EDI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EDI]); - print_location(st, uc->uc_mcontext.gregs[EDI]); - #endif // AMD64 st->cr(); st->cr(); @@ -865,7 +770,52 @@ ExtendedPC epc = os::Solaris::ucontext_get_ExtendedPC(uc); address pc = epc.pc(); st->print_cr("Instructions: (pc=" PTR_FORMAT ")", pc); - print_hex_dump(st, pc - 16, pc + 16, sizeof(char)); + print_hex_dump(st, pc - 32, pc + 32, sizeof(char)); +} + +void os::print_register_info(outputStream *st, void *context) { + if (context == NULL) return; + + ucontext_t *uc = (ucontext_t*)context; + + st->print_cr("Register to memory mapping:"); + st->cr(); + + // this is horrendously verbose but the layout of the registers in the + // context does not match how we defined our abstract Register set, so + // we can't just iterate through the gregs area + + // this is only for the "general purpose" registers + +#ifdef AMD64 + st->print("RAX="); print_location(st, uc->uc_mcontext.gregs[REG_RAX]); + st->print("RBX="); print_location(st, uc->uc_mcontext.gregs[REG_RBX]); + st->print("RCX="); print_location(st, uc->uc_mcontext.gregs[REG_RCX]); + st->print("RDX="); print_location(st, uc->uc_mcontext.gregs[REG_RDX]); + st->print("RSP="); print_location(st, uc->uc_mcontext.gregs[REG_RSP]); + st->print("RBP="); print_location(st, uc->uc_mcontext.gregs[REG_RBP]); + st->print("RSI="); print_location(st, uc->uc_mcontext.gregs[REG_RSI]); + st->print("RDI="); print_location(st, uc->uc_mcontext.gregs[REG_RDI]); + st->print("R8 ="); print_location(st, uc->uc_mcontext.gregs[REG_R8]); + st->print("R9 ="); print_location(st, uc->uc_mcontext.gregs[REG_R9]); + st->print("R10="); print_location(st, uc->uc_mcontext.gregs[REG_R10]); + st->print("R11="); print_location(st, uc->uc_mcontext.gregs[REG_R11]); + st->print("R12="); print_location(st, uc->uc_mcontext.gregs[REG_R12]); + st->print("R13="); print_location(st, uc->uc_mcontext.gregs[REG_R13]); + st->print("R14="); print_location(st, uc->uc_mcontext.gregs[REG_R14]); + st->print("R15="); print_location(st, uc->uc_mcontext.gregs[REG_R15]); +#else + st->print("EAX="); print_location(st, uc->uc_mcontext.gregs[EAX]); + st->print("EBX="); print_location(st, uc->uc_mcontext.gregs[EBX]); + st->print("ECX="); print_location(st, uc->uc_mcontext.gregs[ECX]); + st->print("EDX="); print_location(st, uc->uc_mcontext.gregs[EDX]); + st->print("ESP="); print_location(st, uc->uc_mcontext.gregs[UESP]); + st->print("EBP="); print_location(st, uc->uc_mcontext.gregs[EBP]); + st->print("ESI="); print_location(st, uc->uc_mcontext.gregs[ESI]); + st->print("EDI="); print_location(st, uc->uc_mcontext.gregs[EDI]); +#endif + + st->cr(); }