Mercurial > hg > truffle
diff src/cpu/x86/vm/x86_64.ad @ 785:2056494941db
6814842: Load shortening optimizations
Summary: 6797305 handles load widening but no shortening which should be covered here.
Reviewed-by: never, kvn
author | twisti |
---|---|
date | Wed, 13 May 2009 00:45:22 -0700 |
parents | 93c14e5562c4 |
children | 18a08a7e16b5 |
line wrap: on
line diff
--- a/src/cpu/x86/vm/x86_64.ad Mon May 11 18:30:13 2009 -0700 +++ b/src/cpu/x86/vm/x86_64.ad Wed May 13 00:45:22 2009 -0700 @@ -6459,6 +6459,18 @@ ins_pipe(ialu_reg_mem); %} +// Load Short (16 bit signed) to Byte (8 bit signed) +instruct loadS2B(rRegI dst, memory mem, immI_24 twentyfour) %{ + match(Set dst (RShiftI (LShiftI (LoadS mem) twentyfour) twentyfour)); + + ins_cost(125); + format %{ "movsbl $dst, $mem\t# short -> byte" %} + ins_encode %{ + __ movsbl($dst$$Register, $mem$$Address); + %} + ins_pipe(ialu_reg_mem); +%} + // Load Short (16 bit signed) into Long Register instruct loadS2L(rRegL dst, memory mem) %{ @@ -6489,6 +6501,18 @@ ins_pipe(ialu_reg_mem); %} +// Load Unsigned Short/Char (16 bit UNsigned) to Byte (8 bit signed) +instruct loadUS2B(rRegI dst, memory mem, immI_24 twentyfour) %{ + match(Set dst (RShiftI (LShiftI (LoadUS mem) twentyfour) twentyfour)); + + ins_cost(125); + format %{ "movsbl $dst, $mem\t# ushort -> byte" %} + ins_encode %{ + __ movsbl($dst$$Register, $mem$$Address); + %} + ins_pipe(ialu_reg_mem); +%} + // Load Unsigned Short/Char (16 bit UNsigned) into Long Register instruct loadUS2L(rRegL dst, memory mem) %{ @@ -6519,6 +6543,54 @@ ins_pipe(ialu_reg_mem); %} +// Load Integer (32 bit signed) to Byte (8 bit signed) +instruct loadI2B(rRegI dst, memory mem, immI_24 twentyfour) %{ + match(Set dst (RShiftI (LShiftI (LoadI mem) twentyfour) twentyfour)); + + ins_cost(125); + format %{ "movsbl $dst, $mem\t# int -> byte" %} + ins_encode %{ + __ movsbl($dst$$Register, $mem$$Address); + %} + ins_pipe(ialu_reg_mem); +%} + +// Load Integer (32 bit signed) to Unsigned Byte (8 bit UNsigned) +instruct loadI2UB(rRegI dst, memory mem, immI_255 mask) %{ + match(Set dst (AndI (LoadI mem) mask)); + + ins_cost(125); + format %{ "movzbl $dst, $mem\t# int -> ubyte" %} + ins_encode %{ + __ movzbl($dst$$Register, $mem$$Address); + %} + ins_pipe(ialu_reg_mem); +%} + +// Load Integer (32 bit signed) to Short (16 bit signed) +instruct loadI2S(rRegI dst, memory mem, immI_16 sixteen) %{ + match(Set dst (RShiftI (LShiftI (LoadI mem) sixteen) sixteen)); + + ins_cost(125); + format %{ "movswl $dst, $mem\t# int -> short" %} + ins_encode %{ + __ movswl($dst$$Register, $mem$$Address); + %} + ins_pipe(ialu_reg_mem); +%} + +// Load Integer (32 bit signed) to Unsigned Short/Char (16 bit UNsigned) +instruct loadI2US(rRegI dst, memory mem, immI_65535 mask) %{ + match(Set dst (AndI (LoadI mem) mask)); + + ins_cost(125); + format %{ "movzwl $dst, $mem\t# int -> ushort/char" %} + ins_encode %{ + __ movzwl($dst$$Register, $mem$$Address); + %} + ins_pipe(ialu_reg_mem); +%} + // Load Integer into Long Register instruct loadI2L(rRegL dst, memory mem) %{