--- a/src/share/vm/adlc/output_h.cpp	Tue Apr 01 14:09:03 2014 +0200
+++ b/src/share/vm/adlc/output_h.cpp	Tue Apr 01 13:57:07 2014 +0200
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -26,11 +26,7 @@
 #include "adlc.hpp"
 
 // The comment delimiter used in format statements after assembler instructions.
-#if defined(PPC64)
-#define commentSeperator "\t//"
-#else
 #define commentSeperator "!"
-#endif
 
 // Generate the #define that describes the number of registers.
 static void defineRegCount(FILE *fp, RegisterForm *registers) {
@@ -1555,20 +1551,7 @@
     if ( instr->is_ideal_jump() ) {
       fprintf(fp, "  GrowableArray<Label*> _index2label;\n");
     }
-
-    fprintf(fp, "public:\n");
-
-    Attribute *att = instr->_attribs;
-    // Fields of the node specified in the ad file.
-    while (att != NULL) {
-      if (strncmp(att->_ident, "ins_field_", 10) == 0) {
-        const char *field_name = att->_ident+10;
-        const char *field_type = att->_val;
-        fprintf(fp, "  %s _%s;\n", field_type, field_name);
-      }
-      att = (Attribute *)att->_next;
-    }
-
+    fprintf(fp,"public:\n");
     fprintf(fp,"  MachOper *opnd_array(uint operand_index) const {\n");
     fprintf(fp,"    assert(operand_index < _num_opnds, \"invalid _opnd_array index\");\n");
     fprintf(fp,"    return _opnd_array[operand_index];\n");
@@ -1615,19 +1598,14 @@
     Attribute *attr = instr->_attribs;
     bool avoid_back_to_back = false;
     while (attr != NULL) {
-      if (strcmp (attr->_ident, "ins_cost") != 0 &&
-          strncmp(attr->_ident, "ins_field_", 10) != 0 &&
-          // Must match function in node.hpp: return type bool, no prefix "ins_".
-          strcmp (attr->_ident, "ins_is_TrapBasedCheckNode") != 0 &&
-          strcmp (attr->_ident, "ins_short_branch") != 0) {
-        fprintf(fp, "  virtual int            %s() const { return %s; }\n", attr->_ident, attr->_val);
+      if (strcmp(attr->_ident,"ins_cost") &&
+          strcmp(attr->_ident,"ins_short_branch")) {
+        fprintf(fp,"          int            %s() const { return %s; }\n",
+                attr->_ident, attr->_val);
       }
       // Check value for ins_avoid_back_to_back, and if it is true (1), set the flag
-      if (!strcmp(attr->_ident, "ins_avoid_back_to_back") != 0 && attr->int_val(*this) != 0)
+      if (!strcmp(attr->_ident,"ins_avoid_back_to_back") && attr->int_val(*this) != 0)
         avoid_back_to_back = true;
-      if (strcmp (attr->_ident, "ins_is_TrapBasedCheckNode") == 0)
-        fprintf(fp, "  virtual bool           is_TrapBasedCheckNode() const { return %s; }\n", attr->_val);
-
       attr = (Attribute *)attr->_next;
     }
 
@@ -1641,12 +1619,7 @@
     // Output the opcode function and the encode function here using the
     // encoding class information in the _insencode slot.
     if ( instr->_insencode ) {
-      if (instr->postalloc_expands()) {
-        fprintf(fp,"  virtual bool           requires_postalloc_expand() const { return true; }\n");
-        fprintf(fp,"  virtual void           postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);\n");
-      } else {
-        fprintf(fp,"  virtual void           emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;\n");
-      }
+      fprintf(fp,"  virtual void           emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;\n");
     }
 
     // virtual function for getting the size of an instruction
@@ -1663,19 +1636,6 @@
             instr->ideal_Opcode(_globalNames) );
     }
 
-    if (instr->needs_constant_base() &&
-        !instr->is_mach_constant()) {  // These inherit the funcion from MachConstantNode.
-      fprintf(fp,"  virtual uint           mach_constant_base_node_input() const { ");
-      if (instr->is_ideal_call() != Form::invalid_type &&
-          instr->is_ideal_call() != Form::JAVA_LEAF) {
-        // MachConstantBase goes behind arguments, but before jvms.
-        fprintf(fp,"assert(tf() && tf()->domain(), \"\"); return tf()->domain()->cnt();");
-      } else {
-        fprintf(fp,"return req()-1;");
-      }
-      fprintf(fp," }\n");
-    }
-
     // Allow machine-independent optimization, invert the sense of the IF test
     if( instr->is_ideal_if() ) {
       fprintf(fp,"  virtual void           negate() { \n");
@@ -1844,7 +1804,6 @@
     if( instr->expands() || instr->needs_projections() ||
         instr->has_temps() ||
         instr->is_mach_constant() ||
-        instr->needs_constant_base() ||
         instr->_matrule != NULL &&
         instr->num_opnds() != instr->num_unique_opnds() ) {
       fprintf(fp,"  virtual MachNode      *Expand(State *state, Node_List &proj_list, Node* mem);\n");