diff mx/mx_graal.py @ 20994:68ff637e95b1

Merge
author Stefan Anzinger <stefan.anzinger@oracle.com>
date Thu, 16 Apr 2015 17:09:06 +0200
parents 0a4bbeae6e31 4213d02d95b5
children 5e78d067ebbe
line wrap: on
line diff
--- a/mx/mx_graal.py	Thu Apr 16 17:01:53 2015 +0200
+++ b/mx/mx_graal.py	Thu Apr 16 17:09:06 2015 +0200
@@ -1543,7 +1543,7 @@
 
     with VM('graal', 'product'):
         with Task('BootstrapWithRegisterPressure:product', tasks) as t:
-            if t: 
+            if t:
                 registers = 'o0,o1,o2,o3,f8,f9,d32,d34' if platform.processor() == 'sparc' else 'rbx,r11,r10,r14,xmm3,xmm11,xmm14'
                 vm(['-XX:-TieredCompilation', '-G:RegisterPressure=' + registers, '-esa', '-version'])
 
@@ -2160,7 +2160,7 @@
         'intel/hsdis-amd64.dll' : '6a388372cdd5fe905c1a26ced614334e405d1f30',
         'intel/hsdis-amd64.so' : '844ed9ffed64fe9599638f29a8450c50140e3192',
         'intel/hsdis-amd64.dylib' : 'fdb13ef0d7d23d93dacaae9c98837bea0d4fc5a2',
-        'sparcv9/hsdis-sparcv9.so': '5f79c312b3dcc55bad551dbb710b11f0048a4ce7',
+        'sparcv9/hsdis-sparcv9.so': '970640a9af0bd63641f9063c11275b371a59ee60',
     }
 
     flavoredLib = flavor + "/" + lib