Mercurial > hg > truffle
diff src/cpu/sparc/vm/sparc.ad @ 2401:7e88bdae86ec
7029017: Additional architecture support for c2 compiler
Summary: Enables cross building of a c2 VM. Support masking of shift counts when the processor architecture mandates it.
Reviewed-by: kvn, never
author | roland |
---|---|
date | Fri, 25 Mar 2011 09:35:39 +0100 |
parents | ab42c7e1cf83 |
children | faa472957b38 |
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--- a/src/cpu/sparc/vm/sparc.ad Fri Mar 25 18:19:22 2011 -0400 +++ b/src/cpu/sparc/vm/sparc.ad Fri Mar 25 09:35:39 2011 +0100 @@ -1843,6 +1843,10 @@ // registers? True for Intel but false for most RISCs const bool Matcher::clone_shift_expressions = false; +// Do we need to mask the count passed to shift instructions or does +// the cpu only look at the lower 5/6 bits anyway? +const bool Matcher::need_masked_shift_count = false; + bool Matcher::narrow_oop_use_complex_address() { NOT_LP64(ShouldNotCallThis()); assert(UseCompressedOops, "only for compressed oops code");