Mercurial > hg > truffle
diff src/cpu/x86/vm/vm_version_x86.cpp @ 6179:8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
Summary: Increase vector size up to 256-bits for YMM AVX registers on x86.
Reviewed-by: never, twisti, roland
| author | kvn |
|---|---|
| date | Fri, 15 Jun 2012 01:25:19 -0700 |
| parents | 0368109684cb |
| children | 2c368ea3e844 |
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--- a/src/cpu/x86/vm/vm_version_x86.cpp Thu Jun 14 14:59:52 2012 -0700 +++ b/src/cpu/x86/vm/vm_version_x86.cpp Fri Jun 15 01:25:19 2012 -0700 @@ -467,6 +467,32 @@ if (!supports_avx ()) // Drop to 0 if no AVX support UseAVX = 0; +#ifdef COMPILER2 + if (UseFPUForSpilling) { + if (UseSSE < 2) { + // Only supported with SSE2+ + FLAG_SET_DEFAULT(UseFPUForSpilling, false); + } + } + if (MaxVectorSize > 0) { + if (!is_power_of_2(MaxVectorSize)) { + warning("MaxVectorSize must be a power of 2"); + FLAG_SET_DEFAULT(MaxVectorSize, 32); + } + if (MaxVectorSize > 32) { + FLAG_SET_DEFAULT(MaxVectorSize, 32); + } + if (MaxVectorSize > 16 && UseAVX == 0) { + // Only supported with AVX+ + FLAG_SET_DEFAULT(MaxVectorSize, 16); + } + if (UseSSE < 2) { + // Only supported with SSE2+ + FLAG_SET_DEFAULT(MaxVectorSize, 0); + } + } +#endif + // On new cpus instructions which update whole XMM register should be used // to prevent partial register stall due to dependencies on high half. // @@ -544,6 +570,12 @@ } } +#ifdef COMPILER2 + if (MaxVectorSize > 16) { + // Limit vectors size to 16 bytes on current AMD cpus. + FLAG_SET_DEFAULT(MaxVectorSize, 16); + } +#endif // COMPILER2 } if( is_intel() ) { // Intel cpus specific settings @@ -606,15 +638,6 @@ FLAG_SET_DEFAULT(UsePopCountInstruction, false); } -#ifdef COMPILER2 - if (UseFPUForSpilling) { - if (UseSSE < 2) { - // Only supported with SSE2+ - FLAG_SET_DEFAULT(UseFPUForSpilling, false); - } - } -#endif - assert(0 <= ReadPrefetchInstr && ReadPrefetchInstr <= 3, "invalid value"); assert(0 <= AllocatePrefetchInstr && AllocatePrefetchInstr <= 3, "invalid value");