Mercurial > hg > truffle
diff src/share/vm/opto/matcher.hpp @ 6179:8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
Summary: Increase vector size up to 256-bits for YMM AVX registers on x86.
Reviewed-by: never, twisti, roland
| author | kvn |
|---|---|
| date | Fri, 15 Jun 2012 01:25:19 -0700 |
| parents | db2e64ca2d5a |
| children | da91efe96a93 |
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--- a/src/share/vm/opto/matcher.hpp Thu Jun 14 14:59:52 2012 -0700 +++ b/src/share/vm/opto/matcher.hpp Fri Jun 15 01:25:19 2012 -0700 @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -250,10 +250,21 @@ static const bool convL2FSupported(void); // Vector width in bytes - static const uint vector_width_in_bytes(void); + static const int vector_width_in_bytes(BasicType bt); + + // Limits on vector size (number of elements). + static const int max_vector_size(const BasicType bt); + static const int min_vector_size(const BasicType bt); + static const bool vector_size_supported(const BasicType bt, int size) { + return (Matcher::max_vector_size(bt) >= size && + Matcher::min_vector_size(bt) <= size); + } // Vector ideal reg - static const uint vector_ideal_reg(void); + static const int vector_ideal_reg(int len); + + // CPU supports misaligned vectors store/load. + static const bool misaligned_vectors_ok(); // Used to determine a "low complexity" 64-bit constant. (Zero is simple.) // The standard of comparison is one (StoreL ConL) vs. two (StoreI ConI).