Mercurial > hg > truffle
diff src/cpu/x86/vm/assembler_x86.cpp @ 2106:91fe28b03d6a
Merge.
author | Thomas Wuerthinger <wuerthinger@ssw.jku.at> |
---|---|
date | Wed, 26 Jan 2011 18:17:37 +0100 |
parents | 06f017f7daa7 b1a2afa37ec4 |
children | d9e4d0aefc90 |
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--- a/src/cpu/x86/vm/assembler_x86.cpp Sat Jan 22 17:31:11 2011 +0100 +++ b/src/cpu/x86/vm/assembler_x86.cpp Wed Jan 26 18:17:37 2011 +0100 @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -820,7 +820,20 @@ } -// Now the Assembler instruction (identical for 32/64 bits) +// Now the Assembler instructions (identical for 32/64 bits) + +void Assembler::adcl(Address dst, int32_t imm32) { + InstructionMark im(this); + prefix(dst); + emit_arith_operand(0x81, rdx, dst, imm32); +} + +void Assembler::adcl(Address dst, Register src) { + InstructionMark im(this); + prefix(dst, src); + emit_byte(0x11); + emit_operand(src, dst); +} void Assembler::adcl(Register dst, int32_t imm32) { prefix(dst); @@ -2195,9 +2208,7 @@ void Assembler::orl(Address dst, int32_t imm32) { InstructionMark im(this); prefix(dst); - emit_byte(0x81); - emit_operand(rcx, dst, 4); - emit_long(imm32); + emit_arith_operand(0x81, rcx, dst, imm32); } void Assembler::orl(Register dst, int32_t imm32) { @@ -2205,7 +2216,6 @@ emit_arith(0x81, 0xC8, dst, imm32); } - void Assembler::orl(Register dst, Address src) { InstructionMark im(this); prefix(src, dst); @@ -2213,7 +2223,6 @@ emit_operand(dst, src); } - void Assembler::orl(Register dst, Register src) { (void) prefix_and_encode(dst->encoding(), src->encoding()); emit_arith(0x0B, 0xC0, dst, src); @@ -2692,20 +2701,7 @@ void Assembler::subl(Address dst, int32_t imm32) { InstructionMark im(this); prefix(dst); - if (is8bit(imm32)) { - emit_byte(0x83); - emit_operand(rbp, dst, 1); - emit_byte(imm32 & 0xFF); - } else { - emit_byte(0x81); - emit_operand(rbp, dst, 4); - emit_long(imm32); - } -} - -void Assembler::subl(Register dst, int32_t imm32) { - prefix(dst); - emit_arith(0x81, 0xE8, dst, imm32); + emit_arith_operand(0x81, rbp, dst, imm32); } void Assembler::subl(Address dst, Register src) { @@ -2715,6 +2711,11 @@ emit_operand(src, dst); } +void Assembler::subl(Register dst, int32_t imm32) { + prefix(dst); + emit_arith(0x81, 0xE8, dst, imm32); +} + void Assembler::subl(Register dst, Address src) { InstructionMark im(this); prefix(src, dst); @@ -4333,6 +4334,7 @@ emit_byte(0xD3); emit_byte(0xF8 | encode); } + void Assembler::sbbq(Address dst, int32_t imm32) { InstructionMark im(this); prefixq(dst); @@ -4392,20 +4394,7 @@ void Assembler::subq(Address dst, int32_t imm32) { InstructionMark im(this); prefixq(dst); - if (is8bit(imm32)) { - emit_byte(0x83); - emit_operand(rbp, dst, 1); - emit_byte(imm32 & 0xFF); - } else { - emit_byte(0x81); - emit_operand(rbp, dst, 4); - emit_long(imm32); - } -} - -void Assembler::subq(Register dst, int32_t imm32) { - (void) prefixq_and_encode(dst->encoding()); - emit_arith(0x81, 0xE8, dst, imm32); + emit_arith_operand(0x81, rbp, dst, imm32); } void Assembler::subq(Address dst, Register src) { @@ -4415,6 +4404,11 @@ emit_operand(src, dst); } +void Assembler::subq(Register dst, int32_t imm32) { + (void) prefixq_and_encode(dst->encoding()); + emit_arith(0x81, 0xE8, dst, imm32); +} + void Assembler::subq(Register dst, Address src) { InstructionMark im(this); prefixq(src, dst); @@ -7138,9 +7132,9 @@ } // Preserves rbx, and rdx. -void MacroAssembler::tlab_refill(Label& retry, - Label& try_eden, - Label& slow_case) { +Register MacroAssembler::tlab_refill(Label& retry, + Label& try_eden, + Label& slow_case) { Register top = rax; Register t1 = rcx; Register t2 = rsi; @@ -7187,7 +7181,7 @@ // if tlab is currently allocated (top or end != null) then // fill [top, end + alignment_reserve) with array object - testptr (top, top); + testptr(top, top); jcc(Assembler::zero, do_refill); // set up the mark word @@ -7199,16 +7193,20 @@ movl(Address(top, arrayOopDesc::length_offset_in_bytes()), t1); // set klass to intArrayKlass // dubious reloc why not an oop reloc? - movptr(t1, ExternalAddress((address) Universe::intArrayKlassObj_addr())); + movptr(t1, ExternalAddress((address)Universe::intArrayKlassObj_addr())); // store klass last. concurrent gcs assumes klass length is valid if // klass field is not null. store_klass(top, t1); + movptr(t1, top); + subptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_start_offset()))); + incr_allocated_bytes(thread_reg, t1, 0); + // refill the tlab with an eden allocation bind(do_refill); movptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_size_offset()))); shlptr(t1, LogHeapWordSize); - // add object_size ?? + // allocate new tlab, address returned in top eden_allocate(top, t1, 0, t2, slow_case); // Check that t1 was preserved in eden_allocate. @@ -7236,6 +7234,34 @@ movptr(Address(thread_reg, in_bytes(JavaThread::tlab_end_offset())), top); verify_tlab(); jmp(retry); + + return thread_reg; // for use by caller +} + +void MacroAssembler::incr_allocated_bytes(Register thread, + Register var_size_in_bytes, + int con_size_in_bytes, + Register t1) { +#ifdef _LP64 + if (var_size_in_bytes->is_valid()) { + addq(Address(thread, in_bytes(JavaThread::allocated_bytes_offset())), var_size_in_bytes); + } else { + addq(Address(thread, in_bytes(JavaThread::allocated_bytes_offset())), con_size_in_bytes); + } +#else + if (!thread->is_valid()) { + assert(t1->is_valid(), "need temp reg"); + thread = t1; + get_thread(thread); + } + + if (var_size_in_bytes->is_valid()) { + addl(Address(thread, in_bytes(JavaThread::allocated_bytes_offset())), var_size_in_bytes); + } else { + addl(Address(thread, in_bytes(JavaThread::allocated_bytes_offset())), con_size_in_bytes); + } + adcl(Address(thread, in_bytes(JavaThread::allocated_bytes_offset())+4), 0); +#endif } static const double pi_4 = 0.7853981633974483;