Mercurial > hg > truffle
diff src/cpu/x86/vm/assembler_x86.cpp @ 14726:92aa6797d639
Backed out merge changeset: b51e29501f30
Backed out merge revision to its first parent (8f483e200405)
author | Doug Simon <doug.simon@oracle.com> |
---|---|
date | Mon, 24 Mar 2014 21:30:43 +0100 |
parents | b51e29501f30 |
children |
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--- a/src/cpu/x86/vm/assembler_x86.cpp Fri Mar 21 16:36:59 2014 -0700 +++ b/src/cpu/x86/vm/assembler_x86.cpp Mon Mar 24 21:30:43 2014 +0100 @@ -1089,21 +1089,6 @@ emit_arith(0x23, 0xC0, dst, src); } -void Assembler::andnl(Register dst, Register src1, Register src2) { - assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported"); - int encode = vex_prefix_0F38_and_encode(dst, src1, src2); - emit_int8((unsigned char)0xF2); - emit_int8((unsigned char)(0xC0 | encode)); -} - -void Assembler::andnl(Register dst, Register src1, Address src2) { - InstructionMark im(this); - assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported"); - vex_prefix_0F38(dst, src1, src2); - emit_int8((unsigned char)0xF2); - emit_operand(dst, src2); -} - void Assembler::bsfl(Register dst, Register src) { int encode = prefix_and_encode(dst->encoding(), src->encoding()); emit_int8(0x0F); @@ -1125,51 +1110,6 @@ emit_int8((unsigned char)(0xC8 | encode)); } -void Assembler::blsil(Register dst, Register src) { - assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported"); - int encode = vex_prefix_0F38_and_encode(rbx, dst, src); - emit_int8((unsigned char)0xF3); - emit_int8((unsigned char)(0xC0 | encode)); -} - -void Assembler::blsil(Register dst, Address src) { - InstructionMark im(this); - assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported"); - vex_prefix_0F38(rbx, dst, src); - emit_int8((unsigned char)0xF3); - emit_operand(rbx, src); -} - -void Assembler::blsmskl(Register dst, Register src) { - assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported"); - int encode = vex_prefix_0F38_and_encode(rdx, dst, src); - emit_int8((unsigned char)0xF3); - emit_int8((unsigned char)(0xC0 | encode)); -} - -void Assembler::blsmskl(Register dst, Address src) { - InstructionMark im(this); - assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported"); - vex_prefix_0F38(rdx, dst, src); - emit_int8((unsigned char)0xF3); - emit_operand(rdx, src); -} - -void Assembler::blsrl(Register dst, Register src) { - assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported"); - int encode = vex_prefix_0F38_and_encode(rcx, dst, src); - emit_int8((unsigned char)0xF3); - emit_int8((unsigned char)(0xC0 | encode)); -} - -void Assembler::blsrl(Register dst, Address src) { - InstructionMark im(this); - assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported"); - vex_prefix_0F38(rcx, dst, src); - emit_int8((unsigned char)0xF3); - emit_operand(rcx, src); -} - void Assembler::call(Label& L, relocInfo::relocType rtype) { // suspect disp32 is always good int operand = LP64_ONLY(disp32_operand) NOT_LP64(imm_operand); @@ -2938,24 +2878,6 @@ emit_operand(dst, src); } -void Assembler::tzcntl(Register dst, Register src) { - assert(VM_Version::supports_bmi1(), "tzcnt instruction not supported"); - emit_int8((unsigned char)0xF3); - int encode = prefix_and_encode(dst->encoding(), src->encoding()); - emit_int8(0x0F); - emit_int8((unsigned char)0xBC); - emit_int8((unsigned char)0xC0 | encode); -} - -void Assembler::tzcntq(Register dst, Register src) { - assert(VM_Version::supports_bmi1(), "tzcnt instruction not supported"); - emit_int8((unsigned char)0xF3); - int encode = prefixq_and_encode(dst->encoding(), src->encoding()); - emit_int8(0x0F); - emit_int8((unsigned char)0xBC); - emit_int8((unsigned char)(0xC0 | encode)); -} - void Assembler::ucomisd(XMMRegister dst, Address src) { NOT_LP64(assert(VM_Version::supports_sse2(), "")); emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_66); @@ -4915,21 +4837,6 @@ emit_arith(0x23, 0xC0, dst, src); } -void Assembler::andnq(Register dst, Register src1, Register src2) { - assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported"); - int encode = vex_prefix_0F38_and_encode_q(dst, src1, src2); - emit_int8((unsigned char)0xF2); - emit_int8((unsigned char)(0xC0 | encode)); -} - -void Assembler::andnq(Register dst, Register src1, Address src2) { - InstructionMark im(this); - assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported"); - vex_prefix_0F38_q(dst, src1, src2); - emit_int8((unsigned char)0xF2); - emit_operand(dst, src2); -} - void Assembler::bsfq(Register dst, Register src) { int encode = prefixq_and_encode(dst->encoding(), src->encoding()); emit_int8(0x0F); @@ -4951,51 +4858,6 @@ emit_int8((unsigned char)(0xC8 | encode)); } -void Assembler::blsiq(Register dst, Register src) { - assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported"); - int encode = vex_prefix_0F38_and_encode_q(rbx, dst, src); - emit_int8((unsigned char)0xF3); - emit_int8((unsigned char)(0xC0 | encode)); -} - -void Assembler::blsiq(Register dst, Address src) { - InstructionMark im(this); - assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported"); - vex_prefix_0F38_q(rbx, dst, src); - emit_int8((unsigned char)0xF3); - emit_operand(rbx, src); -} - -void Assembler::blsmskq(Register dst, Register src) { - assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported"); - int encode = vex_prefix_0F38_and_encode_q(rdx, dst, src); - emit_int8((unsigned char)0xF3); - emit_int8((unsigned char)(0xC0 | encode)); -} - -void Assembler::blsmskq(Register dst, Address src) { - InstructionMark im(this); - assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported"); - vex_prefix_0F38_q(rdx, dst, src); - emit_int8((unsigned char)0xF3); - emit_operand(rdx, src); -} - -void Assembler::blsrq(Register dst, Register src) { - assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported"); - int encode = vex_prefix_0F38_and_encode_q(rcx, dst, src); - emit_int8((unsigned char)0xF3); - emit_int8((unsigned char)(0xC0 | encode)); -} - -void Assembler::blsrq(Register dst, Address src) { - InstructionMark im(this); - assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported"); - vex_prefix_0F38_q(rcx, dst, src); - emit_int8((unsigned char)0xF3); - emit_operand(rcx, src); -} - void Assembler::cdqq() { prefix(REX_W); emit_int8((unsigned char)0x99);