Mercurial > hg > truffle
diff src/cpu/sparc/vm/assembler_sparc.hpp @ 3851:95134e034042
7063629: use cbcond in C2 generated code on T4
Summary: Use new short branch instruction in C2 generated code.
Reviewed-by: never
| author | kvn |
|---|---|
| date | Thu, 11 Aug 2011 12:08:11 -0700 |
| parents | 3d42f82cd811 |
| children | 1af104d6cf99 |
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--- a/src/cpu/sparc/vm/assembler_sparc.hpp Wed Aug 10 14:06:57 2011 -0700 +++ b/src/cpu/sparc/vm/assembler_sparc.hpp Thu Aug 11 12:08:11 2011 -0700 @@ -1192,6 +1192,8 @@ assert(offset() == 0 || !cbcond_before(), "cbcond should not follow an other cbcond"); } +public: + bool use_cbcond(Label& L) { if (!UseCBCond || cbcond_before()) return false; intptr_t x = intptr_t(target_distance(L)) - intptr_t(pc()); @@ -1199,7 +1201,6 @@ return is_simm(x, 12); } -public: // Tells assembler you know that next instruction is delayed Assembler* delayed() { #ifdef CHECK_DELAY @@ -1248,6 +1249,10 @@ inline void bpr(RCondition c, bool a, Predict p, Register s1, address d, relocInfo::relocType rt = relocInfo::none); inline void bpr(RCondition c, bool a, Predict p, Register s1, Label& L); + // compare and branch + inline void cbcond(Condition c, CC cc, Register s1, Register s2, Label& L); + inline void cbcond(Condition c, CC cc, Register s1, int simm5, Label& L); + protected: // use MacroAssembler::br instead // pp 138 @@ -1275,10 +1280,6 @@ inline void cb( Condition c, bool a, address d, relocInfo::relocType rt = relocInfo::none ); inline void cb( Condition c, bool a, Label& L ); - // compare and branch - inline void cbcond(Condition c, CC cc, Register s1, Register s2, Label& L); - inline void cbcond(Condition c, CC cc, Register s1, int simm5, Label& L); - // pp 149 inline void call( address d, relocInfo::relocType rt = relocInfo::runtime_call_type );