diff src/os_cpu/solaris_x86/vm/solaris_x86_32.ad @ 420:a1980da045cc

6462850: generate biased locking code in C2 ideal graph Summary: Inline biased locking code in C2 ideal graph during macro nodes expansion Reviewed-by: never
author kvn
date Fri, 07 Nov 2008 09:29:38 -0800
parents 9ee9cf798b59
children c18cbe5936b8
line wrap: on
line diff
--- a/src/os_cpu/solaris_x86/vm/solaris_x86_32.ad	Thu Nov 06 20:00:03 2008 -0800
+++ b/src/os_cpu/solaris_x86/vm/solaris_x86_32.ad	Fri Nov 07 09:29:38 2008 -0800
@@ -110,16 +110,16 @@
 // This name is KNOWN by the ADLC and cannot be changed.
 // The ADLC forces a 'TypeRawPtr::BOTTOM' output type
 // for this guy.
-instruct tlsLoadP(eAXRegP dst, eFlagsReg cr) %{
+instruct tlsLoadP(eRegP dst, eFlagsReg cr) %{
   match(Set dst (ThreadLocal));
   effect(DEF dst, KILL cr);
 
-  format %{ "MOV    EAX, Thread::current()" %}
+  format %{ "MOV    $dst, Thread::current()" %}
   ins_encode( solaris_tlsencode(dst) );
   ins_pipe( ialu_reg_fat );
 %}
 
-instruct TLS(eAXRegP dst) %{
+instruct TLS(eRegP dst) %{
   match(Set dst (ThreadLocal));
 
   expand %{