Mercurial > hg > truffle
diff src/os_cpu/solaris_sparc/vm/solaris_sparc.s @ 11128:a74ec8831c7b
Merge
author | clucasius |
---|---|
date | Mon, 15 Jul 2013 12:24:32 -0400 |
parents | 980532a806a5 |
children | de6a9e811145 |
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--- a/src/os_cpu/solaris_sparc/vm/solaris_sparc.s Fri Jul 12 17:08:52 2013 -0700 +++ b/src/os_cpu/solaris_sparc/vm/solaris_sparc.s Mon Jul 15 12:24:32 2013 -0400 @@ -21,47 +21,6 @@ !! questions. !! - !! Prototype: int SafeFetch32 (int * adr, int ErrValue) - !! The "ld" at Fetch32 is potentially faulting instruction. - !! If the instruction traps the trap handler will arrange - !! for control to resume at Fetch32Resume. - !! By convention with the trap handler we ensure there is a non-CTI - !! instruction in the trap shadow. - !! - !! The reader might be tempted to move this service to .il. - !! Don't. Sun's CC back-end reads and optimize code emitted - !! by the .il "call", in some cases optimizing the code, completely eliding it, - !! or by moving the code from the "call site". - - !! ASM better know we may use G6 for our own purposes - .register %g6, #ignore - - .globl SafeFetch32 - .align 32 - .global Fetch32PFI, Fetch32Resume -SafeFetch32: - mov %o0, %g1 - mov %o1, %o0 -Fetch32PFI: - ld [%g1], %o0 !! <-- Potentially faulting instruction -Fetch32Resume: - nop - retl - nop - - .globl SafeFetchN - .align 32 - .globl FetchNPFI, FetchNResume -SafeFetchN: - mov %o0, %g1 - mov %o1, %o0 -FetchNPFI: - ldn [%g1], %o0 -FetchNResume: - nop - retl - nop - !! Possibilities: !! -- membar !! -- CAS (SP + BIAS, G0, G0)