Mercurial > hg > truffle
diff src/cpu/sparc/vm/relocInfo_sparc.cpp @ 164:c436414a719e
6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
Summary: Add LoadNKlass and CMoveN nodes, use CmpN and ConN nodes to generate narrow oops compare instructions.
Reviewed-by: never, rasbold
author | kvn |
---|---|
date | Wed, 21 May 2008 13:46:23 -0700 |
parents | a61af66fc99e |
children | d1605aabd0a1 |
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--- a/src/cpu/sparc/vm/relocInfo_sparc.cpp Wed May 21 10:45:07 2008 -0700 +++ b/src/cpu/sparc/vm/relocInfo_sparc.cpp Wed May 21 13:46:23 2008 -0700 @@ -87,6 +87,17 @@ #ifdef _LP64 jint inst2; guarantee(Assembler::inv_op2(inst)==Assembler::sethi_op2, "must be sethi"); + if (format() != 0) { + assert(type() == relocInfo::oop_type, "only narrow oops case"); + jint np = oopDesc::encode_heap_oop((oop)x); + inst &= ~Assembler::hi22(-1); + inst |= Assembler::hi22((intptr_t)np); + ip->set_long_at(0, inst); + inst2 = ip->long_at( NativeInstruction::nop_instruction_size ); + guarantee(Assembler::inv_op(inst2)==Assembler::arith_op, "arith op"); + ip->set_long_at(NativeInstruction::nop_instruction_size, ip->set_data32_simm13( inst2, (intptr_t)np)); + break; + } ip->set_data64_sethi( ip->addr_at(0), (intptr_t)x ); #ifdef COMPILER2 // [RGV] Someone must have missed putting in a reloc entry for the