Mercurial > hg > truffle
diff src/cpu/x86/vm/x86_32.ad @ 4047:d8cb48376797
7097546: Optimize use of CMOVE instructions
Summary: Avoid CMove in a loop if possible. May generate CMove if it could be moved outside a loop.
Reviewed-by: never
author | kvn |
---|---|
date | Wed, 26 Oct 2011 06:08:56 -0700 |
parents | 1af104d6cf99 |
children | 6729bbc1fcd6 |
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--- a/src/cpu/x86/vm/x86_32.ad Tue Oct 25 12:51:13 2011 -0700 +++ b/src/cpu/x86/vm/x86_32.ad Wed Oct 26 06:08:56 2011 -0700 @@ -1393,6 +1393,12 @@ // Threshold size for cleararray. const int Matcher::init_array_short_size = 8 * BytesPerLong; +// Needs 2 CMOV's for longs. +const int Matcher::long_cmove_cost() { return 1; } + +// No CMOVF/CMOVD with SSE/SSE2 +const int Matcher::float_cmove_cost() { return (UseSSE>=1) ? ConditionalMoveLimit : 0; } + // Should the Matcher clone shifts on addressing modes, expecting them to // be subsumed into complex addressing expressions or compute them into // registers? True for Intel but false for most RISCs @@ -7905,6 +7911,40 @@ //----------Conditional Move--------------------------------------------------- // Conditional move +instruct jmovI_reg(cmpOp cop, eFlagsReg cr, eRegI dst, eRegI src) %{ + predicate(!VM_Version::supports_cmov() ); + match(Set dst (CMoveI (Binary cop cr) (Binary dst src))); + ins_cost(200); + format %{ "J$cop,us skip\t# signed cmove\n\t" + "MOV $dst,$src\n" + "skip:" %} + ins_encode %{ + Label Lskip; + // Invert sense of branch from sense of CMOV + __ jccb((Assembler::Condition)($cop$$cmpcode^1), Lskip); + __ movl($dst$$Register, $src$$Register); + __ bind(Lskip); + %} + ins_pipe( pipe_cmov_reg ); +%} + +instruct jmovI_regU(cmpOpU cop, eFlagsRegU cr, eRegI dst, eRegI src) %{ + predicate(!VM_Version::supports_cmov() ); + match(Set dst (CMoveI (Binary cop cr) (Binary dst src))); + ins_cost(200); + format %{ "J$cop,us skip\t# unsigned cmove\n\t" + "MOV $dst,$src\n" + "skip:" %} + ins_encode %{ + Label Lskip; + // Invert sense of branch from sense of CMOV + __ jccb((Assembler::Condition)($cop$$cmpcode^1), Lskip); + __ movl($dst$$Register, $src$$Register); + __ bind(Lskip); + %} + ins_pipe( pipe_cmov_reg ); +%} + instruct cmovI_reg(eRegI dst, eRegI src, eFlagsReg cr, cmpOp cop ) %{ predicate(VM_Version::supports_cmov() ); match(Set dst (CMoveI (Binary cop cr) (Binary dst src)));