Mercurial > hg > truffle
diff src/cpu/x86/vm/assembler_x86.hpp @ 6725:da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
Summary: Remove PermGen, allocate meta-data in metaspace linked to class loaders, rewrite GC walking, rewrite and rename metadata to be C++ classes
Reviewed-by: jmasa, stefank, never, coleenp, kvn, brutisso, mgerdin, dholmes, jrose, twisti, roland
Contributed-by: jmasa <jon.masamitsu@oracle.com>, stefank <stefan.karlsson@oracle.com>, mgerdin <mikael.gerdin@oracle.com>, never <tom.rodriguez@oracle.com>
author | coleenp |
---|---|
date | Sat, 01 Sep 2012 13:25:18 -0400 |
parents | 006050192a5a |
children | 75f33eecc1b3 |
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--- a/src/cpu/x86/vm/assembler_x86.hpp Fri Aug 31 16:39:35 2012 -0700 +++ b/src/cpu/x86/vm/assembler_x86.hpp Sat Sep 01 13:25:18 2012 -0400 @@ -299,7 +299,7 @@ // Convert the raw encoding form into the form expected by the constructor for // Address. An index of 4 (rsp) corresponds to having no index, so convert // that to noreg for the Address constructor. - static Address make_raw(int base, int index, int scale, int disp, bool disp_is_oop); + static Address make_raw(int base, int index, int scale, int disp, relocInfo::relocType disp_reloc); static Address make_array(ArrayAddress); @@ -390,14 +390,6 @@ }; -class OopAddress: public AddressLiteral { - - public: - - OopAddress(address target) : AddressLiteral(target, relocInfo::oop_type){} - -}; - class ExternalAddress: public AddressLiteral { private: static relocInfo::relocType reloc_for_target(address target) { @@ -668,8 +660,6 @@ void emit_arith(int op1, int op2, Register dst, int32_t imm32); // Force generation of a 4 byte immediate value even if it fits into 8bit void emit_arith_imm32(int op1, int op2, Register dst, int32_t imm32); - // only 32bit?? - void emit_arith(int op1, int op2, Register dst, jobject obj); void emit_arith(int op1, int op2, Register dst, Register src); void emit_simd_arith(int opcode, XMMRegister dst, Address src, VexSimdPrefix pre); @@ -1972,6 +1962,9 @@ Register arg_1, Register arg_2, Register arg_3, bool check_exceptions = true); + void get_vm_result (Register oop_result, Register thread); + void get_vm_result_2(Register metadata_result, Register thread); + // These always tightly bind to MacroAssembler::call_VM_base // bypassing the virtual implementation void super_call_VM(Register oop_result, Register last_java_sp, address entry_point, int number_of_arguments = 0, bool check_exceptions = true); @@ -2387,6 +2380,8 @@ void cmp32(Register src1, Address src2); #ifndef _LP64 + void cmpklass(Address dst, Metadata* obj); + void cmpklass(Register dst, Metadata* obj); void cmpoop(Address dst, jobject obj); void cmpoop(Register dst, jobject obj); #endif // _LP64 @@ -2486,6 +2481,9 @@ // for jumps/calls. void call(AddressLiteral entry); + // Emit the CompiledIC call idiom + void ic_call(address entry); + // Jumps // NOTE: these jumps tranfer to the effective address of dst NOT @@ -2723,6 +2721,9 @@ void movoop(Register dst, jobject obj); void movoop(Address dst, jobject obj); + void mov_metadata(Register dst, Metadata* obj); + void mov_metadata(Address dst, Metadata* obj); + void movptr(ArrayAddress dst, Register src); // can this do an lea? void movptr(Register dst, ArrayAddress src); @@ -2775,6 +2776,7 @@ void popptr(Address src) { LP64_ONLY(popq(src)) NOT_LP64(popl(src)); } void pushoop(jobject obj); + void pushklass(Metadata* obj); // sign extend as need a l to ptr sized element void movl2ptr(Register dst, Address src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(movl(dst, src)); }