Mercurial > hg > truffle
view src/cpu/sparc/vm/vmreg_sparc.cpp @ 1634:60a14ad85270
6966411: escape.cpp:450 assert(base->Opcode() == Op_ConP
Summary: Execute IGVN optimization before and after Escape Analysis
Reviewed-by: never
author | kvn |
---|---|
date | Fri, 02 Jul 2010 17:30:30 -0700 |
parents | c18cbe5936b8 |
children | f95d63e2154a |
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/* * Copyright (c) 2006, 2007, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 only, as * published by the Free Software Foundation. * * This code is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * version 2 for more details (a copy is included in the LICENSE file that * accompanied this code). * * You should have received a copy of the GNU General Public License version * 2 along with this work; if not, write to the Free Software Foundation, * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. * * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA * or visit www.oracle.com if you need additional information or have any * questions. * */ #include "incls/_precompiled.incl" #include "incls/_vmreg_sparc.cpp.incl" void VMRegImpl::set_regName() { Register reg = ::as_Register(0); int i; for (i = 0; i < ConcreteRegisterImpl::max_gpr ; ) { regName[i++ ] = reg->name(); regName[i++ ] = reg->name(); reg = reg->successor(); } FloatRegister freg = ::as_FloatRegister(0); for ( ; i < ConcreteRegisterImpl::max_fpr ; ) { regName[i++] = freg->name(); if (freg->encoding() > 31) { regName[i++] = freg->name(); } freg = freg->successor(); } for ( ; i < ConcreteRegisterImpl::number_of_registers ; i ++ ) { regName[i] = "NON-GPR-FPR"; } }